Merge pull request #5431 from markdryan/markdryan/riscv-hf16-fix

disable fp16 flags on RISC-V unless BUILD_HFLOAT16=1

Author: martin-frbg

Makefile.prebuild

@@ -64,11 +64,11 @@ TARGET_FLAGS = -march=rv64imafdcv_zba_zbb_zfh -mabi=lp64d
 endif
 
 ifeq ($(TARGET), RISCV64_ZVL256B)
-TARGET_FLAGS = -march=rv64imafdcv_zvfh_zfh -mabi=lp64d
+TARGET_FLAGS = -march=rv64imafdcv -mabi=lp64d
 endif
 
 ifeq ($(TARGET), RISCV64_ZVL128B)
-TARGET_FLAGS = -march=rv64imafdcv_zvfh_zfh -mabi=lp64d
+TARGET_FLAGS = -march=rv64imafdcv -mabi=lp64d
 endif
 
 ifeq ($(TARGET), RISCV64_GENERIC)

Makefile.riscv64

@@ -7,12 +7,22 @@ CCOMMON_OPT += -march=rv64imafdcv_zba_zbb_zfh_zvl512b -mabi=lp64d
 FCOMMON_OPT += -march=rv64imafdcv_zba_zbb_zfh -mabi=lp64d -static
 endif
 ifeq ($(CORE), RISCV64_ZVL256B)
+ifeq ($(BUILD_HFLOAT16), 1)
 CCOMMON_OPT += -march=rv64imafdcv_zvl256b_zvfh_zfh -mabi=lp64d
 FCOMMON_OPT += -march=rv64imafdcv_zvfh_zfh -mabi=lp64d
+else
+CCOMMON_OPT += -march=rv64imafdcv_zvl256b -mabi=lp64d
+FCOMMON_OPT += -march=rv64imafdcv -mabi=lp64d
+endif
 endif
 ifeq ($(CORE), RISCV64_ZVL128B)
-CCOMMON_OPT += -march=rv64imafdcv_zvfh_zfh -mabi=lp64d 
+ifeq ($(BUILD_HFLOAT16), 1)
+CCOMMON_OPT += -march=rv64imafdcv_zvfh_zfh -mabi=lp64d
 FCOMMON_OPT += -march=rv64imafdcv_zvfh_zfh -mabi=lp64d
+else
+CCOMMON_OPT += -march=rv64imafdcv -mabi=lp64d
+FCOMMON_OPT += -march=rv64imafdcv -mabi=lp64d
+endif
 endif
 ifeq ($(CORE), RISCV64_GENERIC)
 CCOMMON_OPT += -march=rv64imafdc -mabi=lp64d

driver/others/Makefile

@@ -218,7 +218,7 @@ mulx.$(SUFFIX) : $(ARCH)/mulx.c
 	$(CC) $(CFLAGS) -c -DXDOUBLE -UCOMPLEX $< -o $(@F)
 
 detect_riscv64.$(SUFFIX): detect_riscv64.c
-	$(CC) $(CFLAGS) -c -march=rv64imafdcv_zvfh_zfh $< -o $(@F)
+	$(CC) $(CFLAGS) -c -march=rv64imafdcv $< -o $(@F)
 
 xerbla.$(PSUFFIX) : xerbla.c
 	$(CC) $(PFLAGS) -c $< -o $(@F)

driver/others/dynamic_riscv64.c

@@ -97,6 +97,8 @@ struct riscv_hwprobe {
 
 #define RISCV_HWPROBE_KEY_IMA_EXT_0	4
 #define		RISCV_HWPROBE_IMA_V		(1 << 2)
+#define		RISCV_HWPROBE_EXT_ZFH		(1 << 27)
+#define		RISCV_HWPROBE_EXT_ZVFH		(1 << 30)
 
 #ifndef NR_riscv_hwprobe
 #ifndef NR_arch_specific_syscall
@@ -147,6 +149,7 @@ char* gotoblas_corename(void) {
 }
 
 static gotoblas_t* get_coretype(void) {
+	uint64_t vector_mask;
 	unsigned vlenb = 0;
 
 #if !defined(OS_LINUX)
@@ -165,14 +168,23 @@ static gotoblas_t* get_coretype(void) {
 	};
 	int ret = syscall(NR_riscv_hwprobe, pairs, 1, 0, NULL, 0);
 	if (ret == 0) {
-		if (!(pairs[0].value & RISCV_HWPROBE_IMA_V))
+#if defined(BUILD_HFLOAT16)
+		vector_mask = (RISCV_HWPROBE_IMA_V | RISCV_HWPROBE_EXT_ZFH | RISCV_HWPROBE_EXT_ZVFH);
+#else
+		vector_mask = RISCV_HWPROBE_IMA_V;
+#endif
+		if ((pairs[0].value & vector_mask) != vector_mask)
 			return NULL;
 	} else {
+#if defined(BUILD_HFLOAT16)
+		return NULL;
+#else
 		if (!(getauxval(AT_HWCAP) & DETECT_RISCV64_HWCAP_ISA_V))
 			return NULL;
 
 		if (!detect_riscv64_rvv100())
 			return NULL;
+#endif
 	}
 
 	/*