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1 parent 33f6388 commit 3c9a20cCopy full SHA for 3c9a20c
vhdl_lang/src/analysis.rs
@@ -26,6 +26,9 @@ mod standard;
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mod static_expression;
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mod target;
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+// @TODO consider moving facade into analysis
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+pub(crate) use {lock::ReadGuard, root::AnalysisData};
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+
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#[cfg(test)]
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pub(crate) mod tests;
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pub(crate) use root::{Library, LockedUnit};
vhdl_lang/src/analysis/root.rs
@@ -261,10 +261,11 @@ impl Library {
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})
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}
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+ // @TODO optimize O() complexity
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pub(crate) fn secondary_units<'a>(
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&'a self,
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primary: &'a Symbol,
- ) -> impl Iterator<Item = &'a LockedUnit> {
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+ ) -> impl Iterator<Item = &'a LockedUnit> + 'a {
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self.units.iter().filter_map(move |(key, value)| match key {
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UnitKey::Secondary(sym, _) if primary == sym => Some(value),
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_ => None,
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