More rust cleanup

- Renamed common name conflictions (I will put my justification in the PR)
- Fixed invalid instruction retrieval for LLIL
- Added common aliases for llil function, instruction and expression types (see my comment in the PR)
- Refactored the instruction retrieval for LLIL, MLIL and HLIL
- Added instruction index types to MLIL and HLIL
- Moved llil module to lowlevelil module (mlil and hlil will be moved as well)
- Added preliminary LLIL unit testing

Author: emesare

Cargo.toml

@@ -22,4 +22,4 @@ members = [
 
 [profile.release]
 lto = true
-debug = "full"
+debug = "full"

arch/msp430/src/architecture.rs

@@ -8,7 +8,6 @@ use binaryninja::{
         UnusedIntrinsic, UnusedRegisterStack, UnusedRegisterStackInfo,
     },
     disassembly::{InstructionTextToken, InstructionTextTokenKind},
-    llil::{LiftedExpr, Lifter},
     Endianness,
 };
 
@@ -20,6 +19,8 @@ use msp430_asm::{
 use binaryninja::architecture::{
     BranchKind, FlagClassId, FlagGroupId, FlagId, FlagWriteId, RegisterId,
 };
+use binaryninja::lowlevelil::expression::ValueExpr;
+use binaryninja::lowlevelil::{MutableLiftedILExpr, MutableLiftedILFunction};
 use log::error;
 
 const MIN_MNEMONIC: usize = 9;
@@ -192,7 +193,7 @@ impl Architecture for Msp430 {
         &self,
         data: &[u8],
         addr: u64,
-        il: &mut Lifter<Self>,
+        il: &mut MutableLiftedILFunction<Self>,
     ) -> Option<(usize, bool)> {
         match msp430_asm::decode(data) {
             Ok(inst) => {
@@ -224,8 +225,8 @@ impl Architecture for Msp430 {
     fn flag_group_llil<'a>(
         &self,
         _group: Self::FlagGroup,
-        _il: &'a mut Lifter<Self>,
-    ) -> Option<LiftedExpr<'a, Self>> {
+        _il: &'a mut MutableLiftedILFunction<Self>,
+    ) -> Option<MutableLiftedILExpr<'a, Self, ValueExpr>> {
         None
     }
 

arch/msp430/src/lift.rs

@@ -3,10 +3,7 @@ use crate::flag::{Flag, FlagWrite};
 use crate::register::Register;
 use crate::Msp430;
 
-use binaryninja::{
-    architecture::FlagCondition,
-    llil::{Label, LiftedNonSSA, Lifter, Mutable, NonSSA},
-};
+use binaryninja::{architecture::FlagCondition, lowlevelil::lifting::Label};
 
 use msp430_asm::emulate::Emulated;
 use msp430_asm::instruction::Instruction;
@@ -15,6 +12,8 @@ use msp430_asm::operand::{Operand, OperandWidth};
 use msp430_asm::single_operand::SingleOperand;
 use msp430_asm::two_operand::TwoOperand;
 
+use binaryninja::lowlevelil::expression::ValueExpr;
+use binaryninja::lowlevelil::{MutableLiftedILExpr, MutableLiftedILFunction};
 use log::info;
 
 macro_rules! auto_increment {
@@ -169,7 +168,11 @@ macro_rules! conditional_jump {
     };
 }
 
-pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &Lifter<Msp430>) {
+pub(crate) fn lift_instruction(
+    inst: &Instruction,
+    addr: u64,
+    il: &MutableLiftedILFunction<Msp430>,
+) {
     match inst {
         Instruction::Rrc(inst) => {
             let size = match inst.operand_width() {
@@ -631,14 +634,8 @@ pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &Lifter<Msp430
 fn lift_source_operand<'a>(
     operand: &Operand,
     size: usize,
-    il: &'a Lifter<Msp430>,
-) -> binaryninja::llil::Expression<
-    'a,
-    Msp430,
-    Mutable,
-    NonSSA<LiftedNonSSA>,
-    binaryninja::llil::ValueExpr,
-> {
+    il: &'a MutableLiftedILFunction<Msp430>,
+) -> MutableLiftedILExpr<'a, Msp430, ValueExpr> {
     match operand {
         Operand::RegisterDirect(r) => il.reg(size, Register::try_from(*r as u32).unwrap()),
         Operand::Indexed((r, offset)) => il

arch/msp430/src/register.rs

@@ -1,6 +1,7 @@
 use binaryninja::architecture;
 use binaryninja::architecture::{ImplicitRegisterExtend, RegisterId};
 
+use binaryninja::lowlevelil::LowLevelILRegister;
 use std::borrow::Cow;
 
 #[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
@@ -133,8 +134,8 @@ impl architecture::RegisterInfo for Register {
     }
 }
 
-impl From<Register> for binaryninja::llil::Register<Register> {
+impl From<Register> for LowLevelILRegister<Register> {
     fn from(register: Register) -> Self {
-        binaryninja::llil::Register::ArchReg(register)
+        LowLevelILRegister::ArchReg(register)
     }
 }