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befef3d
[Rust] Pretty print LLIL sub expressions
emesare Apr 29, 2025
22844ce
[Rust] Remove Architecture trait bound on LLIL related structures
emesare Apr 30, 2025
8193f13
[Rust] Return `String` instead of `BnString` for cases where lossy co…
emesare May 4, 2025
1677153
[Rust] Remove unused file
emesare May 4, 2025
4e81b6c
[Rust] More cleanup
emesare May 4, 2025
0629024
[Rust] Misc clippy lints
emesare May 4, 2025
de7a210
[Rust] Simplify enterprise initialization
emesare May 4, 2025
f82832f
[Rust] Simplify `BnStrCompatible` trait
emesare May 4, 2025
cb0d31d
[Rust] Simplify usage surrounding c strings
emesare May 4, 2025
ae40689
[Rust] Make `Section::name` return `BnString`
emesare May 5, 2025
6f0aa6b
[Rust] More cleanup regarding `BnString`
emesare May 5, 2025
c266596
[Rust] Misc clippy lints
emesare May 5, 2025
d73c19a
[Rust] Rename `AsCStr` to `IntoCStr`
emesare May 5, 2025
23b6e8f
[Rust] Add string tests
emesare May 7, 2025
730a968
[Rust] Reduce usage of `IntoCStr` in function signatures
emesare May 7, 2025
b4cb6c7
[Rust] Add section tests
emesare May 8, 2025
fdca9b2
[Rust] Retain core string for section strings
emesare May 8, 2025
9464371
[Rust] Correct impls for `Section`
emesare May 8, 2025
d539d18
[Rust] Construct a `SectionBuilder` from a `Section`
emesare May 8, 2025
4359153
[Rust] Metadata API improvements
emesare May 8, 2025
41861d5
[Rust] Improve `FileAccessor`
emesare May 8, 2025
aeae725
[Rust] Implement `LanguageRepresentation` and `LineFormatter`
rbran Apr 10, 2025
11ff31b
[Rust] Add doc comments for undo actions
emesare May 8, 2025
12cc1e0
[Rust] Implement custom interactive handler
rbran Apr 23, 2025
603aa11
[Rust] Misc cleanup
emesare May 9, 2025
81211f5
[Rust] Flow graph API improvements
emesare May 9, 2025
3e16477
[Rust] Fix misc typos
emesare May 9, 2025
155def0
[Rust] Support SSA form properly in low level IL
emesare May 9, 2025
831e18e
[Rust] Remove unneeded mut from Architecture trait signatures
emesare May 9, 2025
aa02c66
[Rust] Add `CoreRegister` name to the `Debug` impl
emesare May 9, 2025
9d23ced
[Rust] Add Assert and ForceVersion LLIL operations
emesare May 10, 2025
39b0d67
[Rust] Remove `NonSSAVariant` bound from `LowLevelILFunction`
emesare May 10, 2025
5fd2f41
[Rust] Move `BinaryReader` and `BinaryWriter` into `binary_view` module
emesare May 11, 2025
32a019a
[Rust] Consult secrets provider when trying to connect to a remote
emesare May 11, 2025
0ab675c
[Rust] Misc cleanup
emesare May 11, 2025
754e743
[Rust] Interaction handler API fixes
emesare May 11, 2025
c185a09
[Rust] Flowgraph API improvements
emesare May 11, 2025
e371b4a
[Rust] Don't panic when a Rust plug-in encounters an unhandled MLIL i…
bdash May 11, 2025
586d31e
[Rust] Remove useless alias function
emesare May 11, 2025
2465223
[Rust] Check lifted call for params and output in mlil test
emesare May 11, 2025
e52bba6
[Rust] Remove extra assert in flowgraph example
emesare May 11, 2025
8d791ae
[Rust] Simplify operand list retrieval for MLIL and HLIL
emesare May 12, 2025
5c14e60
[Rust] Add missing instruction types to MLIL
emesare May 12, 2025
069ba44
[Rust] Misc cleanup
emesare May 12, 2025
1f778ac
[Rust] Add type printer tests
emesare May 12, 2025
38b6bc6
[Rust] Make TypeLibrary ref counted
emesare May 12, 2025
24b8267
[Rust] Add `Display` and `Debug` impl to `Metadata`
emesare May 12, 2025
31c4d04
[Rust] Misc type library cleanup
emesare May 12, 2025
e2e09ba
[Rust] Enclose the `BnString` with "" in the `Debug` impl
emesare May 12, 2025
196142d
[Rust] Add `Platform::get_type_library_by_name`
emesare May 12, 2025
5700069
[Rust] Add type library tests
emesare May 12, 2025
6cbe261
[Rust] Add type library example
emesare May 12, 2025
2b334df
[Rust] Keep `TypeArchiveSnapshotId` as a c_str when passing to core
emesare May 12, 2025
32ca34a
[Rust] Misc cleanup regarding c strings
emesare May 12, 2025
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1 change: 1 addition & 0 deletions Cargo.lock

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9 changes: 5 additions & 4 deletions arch/msp430/src/architecture.rs
Original file line number Diff line number Diff line change
Expand Up @@ -20,11 +20,12 @@ use binaryninja::architecture::{
BranchKind, FlagClassId, FlagGroupId, FlagId, FlagWriteId, RegisterId,
};
use binaryninja::low_level_il::expression::ValueExpr;
use binaryninja::low_level_il::{MutableLiftedILExpr, MutableLiftedILFunction};
use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
use log::error;

const MIN_MNEMONIC: usize = 9;

#[derive(Debug)]
pub struct Msp430 {
handle: CoreArchitecture,
custom_handle: CustomArchitectureHandle<Msp430>,
Expand Down Expand Up @@ -193,7 +194,7 @@ impl Architecture for Msp430 {
&self,
data: &[u8],
addr: u64,
il: &mut MutableLiftedILFunction<Self>,
il: &LowLevelILMutableFunction,
) -> Option<(usize, bool)> {
match msp430_asm::decode(data) {
Ok(inst) => {
Expand Down Expand Up @@ -225,8 +226,8 @@ impl Architecture for Msp430 {
fn flag_group_llil<'a>(
&self,
_group: Self::FlagGroup,
_il: &'a mut MutableLiftedILFunction<Self>,
) -> Option<MutableLiftedILExpr<'a, Self, ValueExpr>> {
_il: &'a LowLevelILMutableFunction,
) -> Option<LowLevelILMutableExpression<'a, ValueExpr>> {
None
}

Expand Down
13 changes: 4 additions & 9 deletions arch/msp430/src/lift.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,6 @@
use crate::architecture::offset_to_absolute;
use crate::flag::{Flag, FlagWrite};
use crate::register::Register;
use crate::Msp430;

use binaryninja::{architecture::FlagCondition, low_level_il::lifting::LowLevelILLabel};

Expand All @@ -13,7 +12,7 @@ use msp430_asm::single_operand::SingleOperand;
use msp430_asm::two_operand::TwoOperand;

use binaryninja::low_level_il::expression::ValueExpr;
use binaryninja::low_level_il::{MutableLiftedILExpr, MutableLiftedILFunction};
use binaryninja::low_level_il::{LowLevelILMutableExpression, LowLevelILMutableFunction};
use log::info;

macro_rules! auto_increment {
Expand Down Expand Up @@ -164,11 +163,7 @@ macro_rules! conditional_jump {
};
}

pub(crate) fn lift_instruction(
inst: &Instruction,
addr: u64,
il: &MutableLiftedILFunction<Msp430>,
) {
pub(crate) fn lift_instruction(inst: &Instruction, addr: u64, il: &LowLevelILMutableFunction) {
match inst {
Instruction::Rrc(inst) => {
let size = match inst.operand_width() {
Expand Down Expand Up @@ -628,8 +623,8 @@ pub(crate) fn lift_instruction(
fn lift_source_operand<'a>(
operand: &Operand,
size: usize,
il: &'a MutableLiftedILFunction<Msp430>,
) -> MutableLiftedILExpr<'a, Msp430, ValueExpr> {
il: &'a LowLevelILMutableFunction,
) -> LowLevelILMutableExpression<'a, ValueExpr> {
match operand {
Operand::RegisterDirect(r) => il.reg(size, Register::try_from(*r as u32).unwrap()),
Operand::Indexed((r, offset)) => il
Expand Down
6 changes: 3 additions & 3 deletions arch/msp430/src/register.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
use binaryninja::architecture;
use binaryninja::architecture::{ImplicitRegisterExtend, RegisterId};

use binaryninja::low_level_il::LowLevelILRegister;
use binaryninja::low_level_il::LowLevelILRegisterKind;
use std::borrow::Cow;

#[derive(Debug, Clone, Copy, PartialEq, Eq, Hash)]
Expand Down Expand Up @@ -134,8 +134,8 @@ impl architecture::RegisterInfo for Register {
}
}

impl From<Register> for LowLevelILRegister<Register> {
impl From<Register> for LowLevelILRegisterKind<Register> {
fn from(register: Register) -> Self {
LowLevelILRegister::ArchReg(register)
LowLevelILRegisterKind::Arch(register)
}
}
5 changes: 3 additions & 2 deletions arch/riscv/disasm/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -291,7 +291,7 @@ impl FloatRegType for () {}
impl FloatRegType for f32 {}
impl FloatRegType for f64 {}

pub trait RegFile: Debug + Sized + Copy + Clone {
pub trait RegFile: Debug + Sized + Copy + Clone + Send + Sync + 'static {
type Int: IntRegType;
type Float: FloatRegType;

Expand Down Expand Up @@ -2331,7 +2331,7 @@ impl StandardExtension for ExtensionSupported {
}
}

pub trait RiscVDisassembler: Debug + Sized + Copy + Clone {
pub trait RiscVDisassembler: 'static + Debug + Sized + Copy + Clone + Send + Sync {
type RegFile: RegFile;
type MulDivExtension: StandardExtension;
type AtomicExtension: StandardExtension;
Expand Down Expand Up @@ -3175,6 +3175,7 @@ pub trait RiscVDisassembler: Debug + Sized + Copy + Clone {

#[derive(Copy, Clone, Debug)]
pub struct RiscVIMACDisassembler<RF: RegFile>(PhantomData<RF>);

impl<RF: RegFile> RiscVDisassembler for RiscVIMACDisassembler<RF> {
type RegFile = RF;
type MulDivExtension = ExtensionSupported;
Expand Down
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