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@bdash bdash commented Aug 1, 2025

ARM64 lifting replaces references to the zero register with constant zeroes. The zero register is not intended to appear in any lifted IL.

In the case of the mrs instruction, the destination being a zero register means the system register is accessed only for a side-effect, and is not stored anywhere. The lifting is updated to specify no output registers for the intrinsic in that case.

@plafosse plafosse self-assigned this Aug 5, 2025
ARM64 lifting replaces references to the zero register with constant
zeroes. The zero register is not intended to appear in any lifted IL.

In the case of the `mrs` instruction, the destination being a zero
register means the system register is accessed only for a side-effect,
and is not stored anywhere. The lifting is updated to specify no output
registers for the intrinsic in that case.
@bdash bdash merged commit 8becb1b into dev Aug 5, 2025
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@bdash bdash deleted the arm64-mrs-xzr branch August 5, 2025 18:52
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3 participants