@@ -1297,9 +1297,11 @@ void CWriter::Write(const Const& const_) {
1297
1297
break ;
1298
1298
}
1299
1299
case Type::V128: {
1300
- Writef (" simde_wasm_i32x4_const(0x%08x, 0x%08x, 0x%08x, 0x%08x)" ,
1301
- const_.vec128 ().u32 (0 ), const_.vec128 ().u32 (1 ),
1302
- const_.vec128 ().u32 (2 ), const_.vec128 ().u32 (3 ));
1300
+ Writef (" v128_const(0x%02x" , const_.vec128 ().u8 (0 ));
1301
+ for (int i = 1 ; i < 16 ; i++) {
1302
+ Writef (" , 0x%02x" , const_.vec128 ().u8 (i));
1303
+ }
1304
+ Write (" )" );
1303
1305
break ;
1304
1306
}
1305
1307
@@ -4178,11 +4180,11 @@ void CWriter::Write(const BinaryExpr& expr) {
4178
4180
break ;
4179
4181
4180
4182
case Opcode::I8X16NarrowI16X8S:
4181
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i8x16_narrow_i16x8 " );
4183
+ WritePrefixBinaryExpr (expr.opcode , " v128_i8x16_narrow_i16x8 " );
4182
4184
break ;
4183
4185
4184
4186
case Opcode::I8X16NarrowI16X8U:
4185
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u8x16_narrow_i16x8 " );
4187
+ WritePrefixBinaryExpr (expr.opcode , " v128_u8x16_narrow_i16x8 " );
4186
4188
break ;
4187
4189
4188
4190
case Opcode::I8X16Shl:
@@ -4210,7 +4212,7 @@ void CWriter::Write(const BinaryExpr& expr) {
4210
4212
break ;
4211
4213
4212
4214
case Opcode::I8X16Swizzle:
4213
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i8x16_swizzle " );
4215
+ WritePrefixBinaryExpr (expr.opcode , " v128_i8x16_swizzle " );
4214
4216
break ;
4215
4217
4216
4218
case Opcode::I16X8Add:
@@ -4230,19 +4232,19 @@ void CWriter::Write(const BinaryExpr& expr) {
4230
4232
break ;
4231
4233
4232
4234
case Opcode::I16X8ExtmulHighI8X16S:
4233
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i16x8_extmul_high_i8x16 " );
4235
+ WritePrefixBinaryExpr (expr.opcode , " v128_i16x8_extmul_high_i8x16 " );
4234
4236
break ;
4235
4237
4236
4238
case Opcode::I16X8ExtmulHighI8X16U:
4237
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u16x8_extmul_high_u8x16 " );
4239
+ WritePrefixBinaryExpr (expr.opcode , " v128_u16x8_extmul_high_u8x16 " );
4238
4240
break ;
4239
4241
4240
4242
case Opcode::I16X8ExtmulLowI8X16S:
4241
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i16x8_extmul_low_i8x16 " );
4243
+ WritePrefixBinaryExpr (expr.opcode , " v128_i16x8_extmul_low_i8x16 " );
4242
4244
break ;
4243
4245
4244
4246
case Opcode::I16X8ExtmulLowI8X16U:
4245
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u16x8_extmul_low_u8x16 " );
4247
+ WritePrefixBinaryExpr (expr.opcode , " v128_u16x8_extmul_low_u8x16 " );
4246
4248
break ;
4247
4249
4248
4250
case Opcode::I16X8MaxS:
@@ -4266,11 +4268,11 @@ void CWriter::Write(const BinaryExpr& expr) {
4266
4268
break ;
4267
4269
4268
4270
case Opcode::I16X8NarrowI32X4S:
4269
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i16x8_narrow_i32x4 " );
4271
+ WritePrefixBinaryExpr (expr.opcode , " v128_i16x8_narrow_i32x4 " );
4270
4272
break ;
4271
4273
4272
4274
case Opcode::I16X8NarrowI32X4U:
4273
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u16x8_narrow_i32x4 " );
4275
+ WritePrefixBinaryExpr (expr.opcode , " v128_u16x8_narrow_i32x4 " );
4274
4276
break ;
4275
4277
4276
4278
case Opcode::I16X8Q15mulrSatS:
@@ -4310,19 +4312,19 @@ void CWriter::Write(const BinaryExpr& expr) {
4310
4312
break ;
4311
4313
4312
4314
case Opcode::I32X4ExtmulHighI16X8S:
4313
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i32x4_extmul_high_i16x8 " );
4315
+ WritePrefixBinaryExpr (expr.opcode , " v128_i32x4_extmul_high_i16x8 " );
4314
4316
break ;
4315
4317
4316
4318
case Opcode::I32X4ExtmulHighI16X8U:
4317
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u32x4_extmul_high_u16x8 " );
4319
+ WritePrefixBinaryExpr (expr.opcode , " v128_u32x4_extmul_high_u16x8 " );
4318
4320
break ;
4319
4321
4320
4322
case Opcode::I32X4ExtmulLowI16X8S:
4321
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i32x4_extmul_low_i16x8 " );
4323
+ WritePrefixBinaryExpr (expr.opcode , " v128_i32x4_extmul_low_i16x8 " );
4322
4324
break ;
4323
4325
4324
4326
case Opcode::I32X4ExtmulLowI16X8U:
4325
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u32x4_extmul_low_u16x8 " );
4327
+ WritePrefixBinaryExpr (expr.opcode , " v128_u32x4_extmul_low_u16x8 " );
4326
4328
break ;
4327
4329
4328
4330
case Opcode::I32X4MaxS:
@@ -4366,19 +4368,19 @@ void CWriter::Write(const BinaryExpr& expr) {
4366
4368
break ;
4367
4369
4368
4370
case Opcode::I64X2ExtmulHighI32X4S:
4369
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i64x2_extmul_high_i32x4 " );
4371
+ WritePrefixBinaryExpr (expr.opcode , " v128_i64x2_extmul_high_i32x4 " );
4370
4372
break ;
4371
4373
4372
4374
case Opcode::I64X2ExtmulHighI32X4U:
4373
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u64x2_extmul_high_u32x4 " );
4375
+ WritePrefixBinaryExpr (expr.opcode , " v128_u64x2_extmul_high_u32x4 " );
4374
4376
break ;
4375
4377
4376
4378
case Opcode::I64X2ExtmulLowI32X4S:
4377
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_i64x2_extmul_low_i32x4 " );
4379
+ WritePrefixBinaryExpr (expr.opcode , " v128_i64x2_extmul_low_i32x4 " );
4378
4380
break ;
4379
4381
4380
4382
case Opcode::I64X2ExtmulLowI32X4U:
4381
- WritePrefixBinaryExpr (expr.opcode , " simde_wasm_u64x2_extmul_low_u32x4 " );
4383
+ WritePrefixBinaryExpr (expr.opcode , " v128_u64x2_extmul_low_u32x4 " );
4382
4384
break ;
4383
4385
4384
4386
case Opcode::I64X2Mul:
@@ -4898,13 +4900,11 @@ void CWriter::Write(const ConvertExpr& expr) {
4898
4900
break ;
4899
4901
4900
4902
case Opcode::I32X4TruncSatF64X2SZero:
4901
- WriteSimpleUnaryExpr (expr.opcode ,
4902
- " simde_wasm_i32x4_trunc_sat_f64x2_zero" );
4903
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i32x4_trunc_sat_f64x2_zero" );
4903
4904
break ;
4904
4905
4905
4906
case Opcode::I32X4TruncSatF64X2UZero:
4906
- WriteSimpleUnaryExpr (expr.opcode ,
4907
- " simde_wasm_u32x4_trunc_sat_f64x2_zero" );
4907
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u32x4_trunc_sat_f64x2_zero" );
4908
4908
break ;
4909
4909
4910
4910
case Opcode::F32X4ConvertI32X4S:
@@ -4916,19 +4916,19 @@ void CWriter::Write(const ConvertExpr& expr) {
4916
4916
break ;
4917
4917
4918
4918
case Opcode::F32X4DemoteF64X2Zero:
4919
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_f32x4_demote_f64x2_zero " );
4919
+ WriteSimpleUnaryExpr (expr.opcode , " v128_f32x4_demote_f64x2_zero " );
4920
4920
break ;
4921
4921
4922
4922
case Opcode::F64X2ConvertLowI32X4S:
4923
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_f64x2_convert_low_i32x4 " );
4923
+ WriteSimpleUnaryExpr (expr.opcode , " v128_f64x2_convert_low_i32x4 " );
4924
4924
break ;
4925
4925
4926
4926
case Opcode::F64X2ConvertLowI32X4U:
4927
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_f64x2_convert_low_u32x4 " );
4927
+ WriteSimpleUnaryExpr (expr.opcode , " v128_f64x2_convert_low_u32x4 " );
4928
4928
break ;
4929
4929
4930
4930
case Opcode::F64X2PromoteLowF32X4:
4931
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_f64x2_promote_low_f32x4 " );
4931
+ WriteSimpleUnaryExpr (expr.opcode , " v128_f64x2_promote_low_f32x4 " );
4932
4932
break ;
4933
4933
4934
4934
default :
@@ -5120,7 +5120,7 @@ void CWriter::Write(const UnaryExpr& expr) {
5120
5120
break ;
5121
5121
5122
5122
case Opcode::I8X16Bitmask:
5123
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i8x16_bitmask " );
5123
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i8x16_bitmask " );
5124
5124
break ;
5125
5125
5126
5126
case Opcode::I8X16Neg:
@@ -5144,7 +5144,7 @@ void CWriter::Write(const UnaryExpr& expr) {
5144
5144
break ;
5145
5145
5146
5146
case Opcode::I16X8Bitmask:
5147
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i16x8_bitmask " );
5147
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i16x8_bitmask " );
5148
5148
break ;
5149
5149
5150
5150
case Opcode::I16X8ExtaddPairwiseI8X16S:
@@ -5158,19 +5158,19 @@ void CWriter::Write(const UnaryExpr& expr) {
5158
5158
break ;
5159
5159
5160
5160
case Opcode::I16X8ExtendHighI8X16S:
5161
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i16x8_extend_high_i8x16 " );
5161
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i16x8_extend_high_i8x16 " );
5162
5162
break ;
5163
5163
5164
5164
case Opcode::I16X8ExtendHighI8X16U:
5165
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u16x8_extend_high_u8x16 " );
5165
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u16x8_extend_high_u8x16 " );
5166
5166
break ;
5167
5167
5168
5168
case Opcode::I16X8ExtendLowI8X16S:
5169
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i16x8_extend_low_i8x16 " );
5169
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i16x8_extend_low_i8x16 " );
5170
5170
break ;
5171
5171
5172
5172
case Opcode::I16X8ExtendLowI8X16U:
5173
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u16x8_extend_low_u8x16 " );
5173
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u16x8_extend_low_u8x16 " );
5174
5174
break ;
5175
5175
5176
5176
case Opcode::I16X8Neg:
@@ -5190,7 +5190,7 @@ void CWriter::Write(const UnaryExpr& expr) {
5190
5190
break ;
5191
5191
5192
5192
case Opcode::I32X4Bitmask:
5193
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i32x4_bitmask " );
5193
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i32x4_bitmask " );
5194
5194
break ;
5195
5195
5196
5196
case Opcode::I32X4ExtaddPairwiseI16X8S:
@@ -5204,19 +5204,19 @@ void CWriter::Write(const UnaryExpr& expr) {
5204
5204
break ;
5205
5205
5206
5206
case Opcode::I32X4ExtendHighI16X8S:
5207
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i32x4_extend_high_i16x8 " );
5207
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i32x4_extend_high_i16x8 " );
5208
5208
break ;
5209
5209
5210
5210
case Opcode::I32X4ExtendHighI16X8U:
5211
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u32x4_extend_high_u16x8 " );
5211
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u32x4_extend_high_u16x8 " );
5212
5212
break ;
5213
5213
5214
5214
case Opcode::I32X4ExtendLowI16X8S:
5215
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i32x4_extend_low_i16x8 " );
5215
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i32x4_extend_low_i16x8 " );
5216
5216
break ;
5217
5217
5218
5218
case Opcode::I32X4ExtendLowI16X8U:
5219
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u32x4_extend_low_u16x8 " );
5219
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u32x4_extend_low_u16x8 " );
5220
5220
break ;
5221
5221
5222
5222
case Opcode::I32X4Neg:
@@ -5236,23 +5236,23 @@ void CWriter::Write(const UnaryExpr& expr) {
5236
5236
break ;
5237
5237
5238
5238
case Opcode::I64X2Bitmask:
5239
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i64x2_bitmask " );
5239
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i64x2_bitmask " );
5240
5240
break ;
5241
5241
5242
5242
case Opcode::I64X2ExtendHighI32X4S:
5243
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i64x2_extend_high_i32x4 " );
5243
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i64x2_extend_high_i32x4 " );
5244
5244
break ;
5245
5245
5246
5246
case Opcode::I64X2ExtendHighI32X4U:
5247
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u64x2_extend_high_u32x4 " );
5247
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u64x2_extend_high_u32x4 " );
5248
5248
break ;
5249
5249
5250
5250
case Opcode::I64X2ExtendLowI32X4S:
5251
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_i64x2_extend_low_i32x4 " );
5251
+ WriteSimpleUnaryExpr (expr.opcode , " v128_i64x2_extend_low_i32x4 " );
5252
5252
break ;
5253
5253
5254
5254
case Opcode::I64X2ExtendLowI32X4U:
5255
- WriteSimpleUnaryExpr (expr.opcode , " simde_wasm_u64x2_extend_low_u32x4 " );
5255
+ WriteSimpleUnaryExpr (expr.opcode , " v128_u64x2_extend_low_u32x4 " );
5256
5256
break ;
5257
5257
5258
5258
case Opcode::I64X2Neg:
@@ -5360,85 +5360,85 @@ void CWriter::Write(const SimdLaneOpExpr& expr) {
5360
5360
5361
5361
switch (expr.opcode ) {
5362
5362
case Opcode::I8X16ExtractLaneS: {
5363
- Write (StackVar (0 , result_type), " = simde_wasm_i8x16_extract_lane (" ,
5363
+ Write (StackVar (0 , result_type), " = v128_i8x16_extract_lane (" ,
5364
5364
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5365
5365
DropTypes (1 );
5366
5366
break ;
5367
5367
}
5368
5368
case Opcode::I8X16ExtractLaneU: {
5369
- Write (StackVar (0 , result_type), " = simde_wasm_u8x16_extract_lane (" ,
5369
+ Write (StackVar (0 , result_type), " = v128_u8x16_extract_lane (" ,
5370
5370
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5371
5371
DropTypes (1 );
5372
5372
break ;
5373
5373
}
5374
5374
case Opcode::I16X8ExtractLaneS: {
5375
- Write (StackVar (0 , result_type), " = simde_wasm_i16x8_extract_lane (" ,
5375
+ Write (StackVar (0 , result_type), " = v128_i16x8_extract_lane (" ,
5376
5376
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5377
5377
DropTypes (1 );
5378
5378
break ;
5379
5379
}
5380
5380
case Opcode::I16X8ExtractLaneU: {
5381
- Write (StackVar (0 , result_type), " = simde_wasm_u16x8_extract_lane (" ,
5381
+ Write (StackVar (0 , result_type), " = v128_u16x8_extract_lane (" ,
5382
5382
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5383
5383
DropTypes (1 );
5384
5384
break ;
5385
5385
}
5386
5386
case Opcode::I32X4ExtractLane: {
5387
- Write (StackVar (0 , result_type), " = simde_wasm_i32x4_extract_lane (" ,
5387
+ Write (StackVar (0 , result_type), " = v128_i32x4_extract_lane (" ,
5388
5388
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5389
5389
DropTypes (1 );
5390
5390
break ;
5391
5391
}
5392
5392
case Opcode::I64X2ExtractLane: {
5393
- Write (StackVar (0 , result_type), " = simde_wasm_i64x2_extract_lane (" ,
5393
+ Write (StackVar (0 , result_type), " = v128_i64x2_extract_lane (" ,
5394
5394
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5395
5395
DropTypes (1 );
5396
5396
break ;
5397
5397
}
5398
5398
case Opcode::F32X4ExtractLane: {
5399
- Write (StackVar (0 , result_type), " = simde_wasm_f32x4_extract_lane (" ,
5399
+ Write (StackVar (0 , result_type), " = v128_f32x4_extract_lane (" ,
5400
5400
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5401
5401
DropTypes (1 );
5402
5402
break ;
5403
5403
}
5404
5404
case Opcode::F64X2ExtractLane: {
5405
- Write (StackVar (0 , result_type), " = simde_wasm_f64x2_extract_lane (" ,
5405
+ Write (StackVar (0 , result_type), " = v128_f64x2_extract_lane (" ,
5406
5406
StackVar (0 ), " , " , expr.val , " );" , Newline ());
5407
5407
DropTypes (1 );
5408
5408
break ;
5409
5409
}
5410
5410
case Opcode::I8X16ReplaceLane: {
5411
- Write (StackVar (1 , result_type), " = simde_wasm_i8x16_replace_lane (" ,
5411
+ Write (StackVar (1 , result_type), " = v128_i8x16_replace_lane (" ,
5412
5412
StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
5413
5413
DropTypes (2 );
5414
5414
break ;
5415
5415
}
5416
5416
case Opcode::I16X8ReplaceLane: {
5417
- Write (StackVar (1 , result_type), " = simde_wasm_i16x8_replace_lane (" ,
5417
+ Write (StackVar (1 , result_type), " = v128_i16x8_replace_lane (" ,
5418
5418
StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
5419
5419
DropTypes (2 );
5420
5420
break ;
5421
5421
}
5422
5422
case Opcode::I32X4ReplaceLane: {
5423
- Write (StackVar (1 , result_type), " = simde_wasm_i32x4_replace_lane (" ,
5423
+ Write (StackVar (1 , result_type), " = v128_i32x4_replace_lane (" ,
5424
5424
StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
5425
5425
DropTypes (2 );
5426
5426
break ;
5427
5427
}
5428
5428
case Opcode::I64X2ReplaceLane: {
5429
- Write (StackVar (1 , result_type), " = simde_wasm_i64x2_replace_lane (" ,
5429
+ Write (StackVar (1 , result_type), " = v128_i64x2_replace_lane (" ,
5430
5430
StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
5431
5431
DropTypes (2 );
5432
5432
break ;
5433
5433
}
5434
5434
case Opcode::F32X4ReplaceLane: {
5435
- Write (StackVar (1 , result_type), " = simde_wasm_f32x4_replace_lane (" ,
5435
+ Write (StackVar (1 , result_type), " = v128_f32x4_replace_lane (" ,
5436
5436
StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
5437
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DropTypes (2 );
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break ;
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}
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case Opcode::F64X2ReplaceLane: {
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- Write (StackVar (1 , result_type), " = simde_wasm_f64x2_replace_lane (" ,
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+ Write (StackVar (1 , result_type), " = v128_f64x2_replace_lane (" ,
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StackVar (1 ), " , " , expr.val , " , " , StackVar (0 ), " );" , Newline ());
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DropTypes (2 );
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break ;
@@ -5507,14 +5507,12 @@ void CWriter::Write(const SimdShuffleOpExpr& expr) {
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Type result_type = expr.opcode .GetResultType ();
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switch (expr.opcode ) {
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case Opcode::I8X16Shuffle: {
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- Write (StackVar (1 , result_type), " = simde_wasm_i8x16_shuffle(" ,
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- StackVar (1 ), " , " , StackVar (0 ), " , " , expr.val .u8 (0 ), " , " ,
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- expr.val .u8 (1 ), " , " , expr.val .u8 (2 ), " , " , expr.val .u8 (3 ), " , " ,
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- expr.val .u8 (4 ), " , " , expr.val .u8 (5 ), " , " , expr.val .u8 (6 ), " , " ,
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- expr.val .u8 (7 ), " , " , expr.val .u8 (8 ), " , " , expr.val .u8 (9 ), " , " ,
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- expr.val .u8 (10 ), " , " , expr.val .u8 (11 ), " , " , expr.val .u8 (12 ), " , " ,
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- expr.val .u8 (13 ), " , " , expr.val .u8 (14 ), " , " , expr.val .u8 (15 ), " );" ,
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- Newline ());
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+ Write (StackVar (1 , result_type), " = v128_i8x16_shuffle(" , StackVar (1 ),
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+ " , " , StackVar (0 ));
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+ for (int i = 0 ; i < 16 ; i++) {
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+ Write (" , " , expr.val .u8 (i));
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+ }
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+ Write (" );" , Newline ());
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DropTypes (2 );
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break ;
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}
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