We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
1 parent acc5603 commit 7f13106Copy full SHA for 7f13106
mlir/test/Dialect/Linalg/tile-sort.mlir
@@ -1,4 +1,4 @@
1
-// RUN: mlir-opt %s -transform-interpreter -split-input-file -debug-only=tile-using-interface 2>&1 | FileCheck %s
+// RUN: mlir-opt %s -transform-interpreter -split-input-file -debug-only=tile-using-interface --mlir-disable-threading 2>&1 | FileCheck %s
2
3
func.func @tile_order_ceil_then_negf(%arg: tensor<256xf32>) -> tensor<256xf32> {
4
// Ops are tiled by lower priority: linalg.powf, linalg.ceil (1st operand of powf, priority = 0),
0 commit comments