Skip to content

Commit f461f17

Browse files
[AIE2] Refactor address space code
1 parent c8475f3 commit f461f17

10 files changed

+128
-87
lines changed

llvm/lib/Target/AIE/AIE2AddrSpace.h

Lines changed: 71 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,14 +4,17 @@
44
// See https://llvm.org/LICENSE.txt for license information.
55
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
66
//
7-
// (c) Copyright 2023-2024 Advanced Micro Devices, Inc. or its affiliates
7+
// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
88
//
99
//===----------------------------------------------------------------------===//
1010
//
1111
// This file declares the AIEngine V2 Address Space and DM banks
1212
//
1313
//===----------------------------------------------------------------------===//
1414

15+
#include "AIEBaseAddrSpaceInfo.h"
16+
#include <bitset>
17+
1518
#ifndef LLVM_SUPPORT_AIE2ADDRSPACE_H
1619
#define LLVM_SUPPORT_AIE2ADDRSPACE_H
1720

@@ -41,6 +44,73 @@ enum class AddressSpaces {
4144
enum class AIEBanks { A, B, C, D, TileMemory };
4245

4346
} // end namespace AIE2
47+
48+
class AIE2AddrSpaceInfo final : public AIEBaseAddrSpaceInfo {
49+
50+
public:
51+
MemoryBankBits getDefaultMemoryBank() const override {
52+
std::bitset<32> MemoryBanks;
53+
using namespace AIE2;
54+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
55+
.set(static_cast<unsigned>(AIEBanks::B))
56+
.set(static_cast<unsigned>(AIEBanks::C))
57+
.set(static_cast<unsigned>(AIEBanks::D));
58+
return MemoryBanks.to_ulong();
59+
}
60+
61+
MemoryBankBits
62+
getMemoryBanksFromAddressSpace(unsigned AddrSpace) const override {
63+
std::bitset<32> MemoryBanks;
64+
using namespace AIE2;
65+
switch (static_cast<AddressSpaces>(AddrSpace)) {
66+
case AddressSpaces::a:
67+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A));
68+
break;
69+
case AddressSpaces::b:
70+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B));
71+
break;
72+
case AddressSpaces::c:
73+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::C));
74+
break;
75+
case AddressSpaces::d:
76+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::D));
77+
break;
78+
case AddressSpaces::ab:
79+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
80+
.set(static_cast<unsigned>(AIEBanks::B));
81+
break;
82+
case AddressSpaces::ac:
83+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
84+
.set(static_cast<unsigned>(AIEBanks::C));
85+
break;
86+
case AddressSpaces::ad:
87+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
88+
.set(static_cast<unsigned>(AIEBanks::D));
89+
break;
90+
case AddressSpaces::bc:
91+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B))
92+
.set(static_cast<unsigned>(AIEBanks::C));
93+
break;
94+
case AddressSpaces::bd:
95+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B))
96+
.set(static_cast<unsigned>(AIEBanks::D));
97+
break;
98+
case AddressSpaces::cd:
99+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::C))
100+
.set(static_cast<unsigned>(AIEBanks::D));
101+
break;
102+
case AddressSpaces::TM:
103+
MemoryBanks.set(static_cast<unsigned>(AIEBanks::TileMemory));
104+
break;
105+
default:
106+
MemoryBanks.set();
107+
break;
108+
}
109+
110+
return MemoryBanks.to_ulong();
111+
}
112+
};
113+
44114
} // end namespace llvm
45115

46116
#endif // LLVM_SUPPORT_AIE2ADDRSPACE_H

llvm/lib/Target/AIE/AIE2Subtarget.cpp

Lines changed: 2 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -77,65 +77,6 @@ InstructionSelector *AIE2Subtarget::getInstructionSelector() const {
7777
return InstSelector.get();
7878
}
7979

80-
MemoryBankBits AIE2Subtarget::getDefaultMemoryBank() const {
81-
using namespace AIE2;
82-
std::bitset<32> MemoryBanks;
83-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
84-
.set(static_cast<unsigned>(AIEBanks::B))
85-
.set(static_cast<unsigned>(AIEBanks::C))
86-
.set(static_cast<unsigned>(AIEBanks::D));
87-
return MemoryBanks.to_ulong();
88-
}
89-
90-
MemoryBankBits
91-
AIE2Subtarget::getMemoryBanksFromAddressSpace(unsigned AddrSpace) const {
92-
using namespace AIE2;
93-
std::bitset<32> MemoryBanks;
94-
95-
switch (static_cast<AddressSpaces>(AddrSpace)) {
96-
case AddressSpaces::a:
97-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A));
98-
break;
99-
case AddressSpaces::b:
100-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B));
101-
break;
102-
case AddressSpaces::c:
103-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::C));
104-
break;
105-
case AddressSpaces::d:
106-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::D));
107-
break;
108-
case AddressSpaces::ab:
109-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
110-
.set(static_cast<unsigned>(AIEBanks::B));
111-
break;
112-
case AddressSpaces::ac:
113-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
114-
.set(static_cast<unsigned>(AIEBanks::C));
115-
break;
116-
case AddressSpaces::ad:
117-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::A))
118-
.set(static_cast<unsigned>(AIEBanks::D));
119-
break;
120-
case AddressSpaces::bc:
121-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B))
122-
.set(static_cast<unsigned>(AIEBanks::C));
123-
break;
124-
case AddressSpaces::bd:
125-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::B))
126-
.set(static_cast<unsigned>(AIEBanks::D));
127-
break;
128-
case AddressSpaces::cd:
129-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::C))
130-
.set(static_cast<unsigned>(AIEBanks::D));
131-
break;
132-
case AddressSpaces::TM:
133-
MemoryBanks.set(static_cast<unsigned>(AIEBanks::TileMemory));
134-
break;
135-
default:
136-
return getDefaultMemoryBank();
137-
break;
138-
}
139-
140-
return MemoryBanks.to_ulong();
80+
const AIEBaseAddrSpaceInfo &AIE2Subtarget::getAddrSpaceInfo() const {
81+
return AddrSpaceInfo;
14182
}

llvm/lib/Target/AIE/AIE2Subtarget.h

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -39,6 +39,7 @@ class StringRef;
3939
class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget {
4040
virtual void anchor();
4141
std::string CPUName;
42+
AIE2AddrSpaceInfo AddrSpaceInfo;
4243
AIE2FrameLowering FrameLowering;
4344
AIE2InstrInfo InstrInfo;
4445
AIE2RegisterInfo RegInfo;
@@ -93,10 +94,6 @@ class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget {
9394
return &TSInfo;
9495
}
9596

96-
MemoryBankBits getDefaultMemoryBank() const override;
97-
MemoryBankBits
98-
getMemoryBanksFromAddressSpace(unsigned AddrSpace) const override;
99-
10097
// Perform target-specific adjustments to the latency of a schedule
10198
// dependency.
10299
// If a pair of operands is associated with the schedule dependency, DefOpIdx
@@ -143,6 +140,7 @@ class AIE2Subtarget : public AIE2GenSubtargetInfo, public AIEBaseSubtarget {
143140
const LegalizerInfo *getLegalizerInfo() const override;
144141
const RegisterBankInfo *getRegBankInfo() const override;
145142
InstructionSelector *getInstructionSelector() const override;
143+
const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const override;
146144
};
147145
} // namespace llvm
148146

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
//===-- AIEBaseAddrSpaceInfo.h - Define Base AddressSpace Class -*- C++-*-===//
2+
//
3+
// This file is licensed under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
5+
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6+
//
7+
// (c) Copyright 2024 Advanced Micro Devices, Inc. or its affiliates
8+
//
9+
//===----------------------------------------------------------------------===//
10+
//
11+
// This file declares the AIEngine Base Address Space class.
12+
//
13+
//===----------------------------------------------------------------------===//
14+
15+
#ifndef LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H
16+
#define LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H
17+
18+
#include <cstdint>
19+
20+
namespace llvm {
21+
22+
using MemoryBankBits = uint64_t;
23+
24+
class AIEBaseAddrSpaceInfo {
25+
public:
26+
virtual MemoryBankBits getDefaultMemoryBank() const {
27+
// By default assume conflicts.
28+
return ~0;
29+
}
30+
31+
virtual MemoryBankBits
32+
getMemoryBanksFromAddressSpace(unsigned AddrSpace) const {
33+
// By default assume conflicts.
34+
return ~0;
35+
}
36+
};
37+
38+
} // end namespace llvm
39+
40+
#endif // LLVM_SUPPORT_AIEBASEADDRSPACEINFO_H

llvm/lib/Target/AIE/AIEBaseSubtarget.cpp

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -146,17 +146,6 @@ const AIEBaseSubtarget &AIEBaseSubtarget::get(const MachineFunction &MF) {
146146
llvm_unreachable("Unknown subtarget");
147147
}
148148

149-
MemoryBankBits
150-
AIEBaseSubtarget::getMemoryBanksFromAddressSpace(unsigned AddrSpace) const {
151-
// By default assume there are no conflicts.
152-
return 0;
153-
}
154-
155-
MemoryBankBits AIEBaseSubtarget::getDefaultMemoryBank() const {
156-
// By default assume there are no conflicts.
157-
return 0;
158-
}
159-
160149
namespace {
161150

162151
// Set latency and declare height/depth dirty if it changes

llvm/lib/Target/AIE/AIEBaseSubtarget.h

Lines changed: 2 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -15,13 +15,13 @@
1515
#ifndef LLVM_LIB_TARGET_AIE_AIEBASESUBTARGET_H
1616
#define LLVM_LIB_TARGET_AIE_AIEBASESUBTARGET_H
1717

18+
#include "AIEBaseAddrSpaceInfo.h"
1819
#include "AIEBaseInstrInfo.h"
1920
#include "Utils/AIEBaseInfo.h"
2021
#include "llvm/CodeGen/ScheduleDAGMutation.h"
2122
#include "llvm/CodeGenTypes/MachineValueType.h"
2223
#include "llvm/MC/MCInstrItineraries.h"
2324
#include "llvm/TargetParser/Triple.h"
24-
#include <bitset>
2525

2626
namespace llvm {
2727

@@ -34,8 +34,6 @@ class ScheduleDAGMutation;
3434
class SUnit;
3535
class SDep;
3636

37-
using MemoryBankBits = uint64_t;
38-
3937
class AIEBaseSubtarget {
4038
private:
4139
Triple TargetTriple;
@@ -48,6 +46,7 @@ class AIEBaseSubtarget {
4846
virtual const TargetRegisterInfo *getRegisterInfo() const = 0;
4947
virtual const TargetFrameLowering *getFrameLowering() const = 0;
5048
virtual const AIEBaseInstrInfo *getInstrInfo() const = 0;
49+
virtual const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const = 0;
5150
AIEABI::ABI getTargetABI() const { return TargetABI; }
5251
bool isAIE1() const { return (TargetTriple.isAIE1()); }
5352
bool isAIE2() const { return (TargetTriple.isAIE2()); }
@@ -70,10 +69,6 @@ class AIEBaseSubtarget {
7069
int DefOpIdx, SUnit *Use, int UseOpIdx,
7170
SDep &Dep) const;
7271

73-
virtual MemoryBankBits
74-
getMemoryBanksFromAddressSpace(unsigned AddrSpace) const;
75-
virtual MemoryBankBits getDefaultMemoryBank() const;
76-
7772
/// Required DAG mutations during Post-RA scheduling.
7873
static std::vector<std::unique_ptr<ScheduleDAGMutation>>
7974
getPostRAMutationsImpl(const Triple &TT);

llvm/lib/Target/AIE/AIEHazardRecognizer.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -619,10 +619,11 @@ AIEHazardRecognizer::getMemoryBanks(const MachineInstr *MI) const {
619619
return ~0;
620620

621621
const AIEBaseSubtarget &STI = AIEBaseSubtarget::get(*MI->getMF());
622-
MemoryBankBits MemoryBankUsed = STI.getDefaultMemoryBank();
622+
const AIEBaseAddrSpaceInfo &ASI = STI.getAddrSpaceInfo();
623+
MemoryBankBits MemoryBankUsed = ASI.getDefaultMemoryBank();
623624
for (auto &MMO : MI->memoperands()) {
624625
MemoryBankBits MemoryBank =
625-
STI.getMemoryBanksFromAddressSpace(MMO->getAddrSpace());
626+
ASI.getMemoryBanksFromAddressSpace(MMO->getAddrSpace());
626627
MemoryBankUsed &= MemoryBank;
627628
}
628629
return MemoryBankUsed;

llvm/lib/Target/AIE/AIEHazardRecognizer.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@
1313
#ifndef LLVM_LIB_TARGET_AIE_AIEHAZARDRECOGNIZER_H
1414
#define LLVM_LIB_TARGET_AIE_AIEHAZARDRECOGNIZER_H
1515

16+
#include "AIEBaseAddrSpaceInfo.h"
1617
#include "AIEBaseSubtarget.h"
1718
#include "AIEBundle.h"
1819
#include "MCTargetDesc/AIEMCFormats.h"

llvm/lib/Target/AIE/AIESubtarget.cpp

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ AIESubtarget::AIESubtarget(const Triple &TT, StringRef CPU, StringRef TuneCPU,
4747
: AIEGenSubtargetInfo(TT, CPU, TuneCPU, FS), AIEBaseSubtarget(TT),
4848
FrameLowering(initializeSubtargetDependencies(TT, CPU, FS, ABIName)),
4949
InstrInfo(), RegInfo(getHwMode()), TLInfo(TM, *this),
50-
InstrItins(getInstrItineraryForCPU(StringRef(CPU))) { // CPUName)) {
50+
InstrItins(getInstrItineraryForCPU(StringRef(CPU))) {
5151
LLVM_DEBUG(dbgs() << "CPU:" << CPU << "." << CPUName << "." << FS << "."
5252
<< ABIName << "\n");
5353

@@ -75,3 +75,7 @@ const RegisterBankInfo *AIESubtarget::getRegBankInfo() const {
7575
InstructionSelector *AIESubtarget::getInstructionSelector() const {
7676
return InstSelector.get();
7777
}
78+
79+
const AIEBaseAddrSpaceInfo &AIESubtarget::getAddrSpaceInfo() const {
80+
return AddrSpaceInfo;
81+
}

llvm/lib/Target/AIE/AIESubtarget.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,7 @@ class StringRef;
3737
class AIESubtarget final : public AIEGenSubtargetInfo, public AIEBaseSubtarget {
3838
virtual void anchor();
3939
std::string CPUName;
40+
AIEBaseAddrSpaceInfo AddrSpaceInfo;
4041
AIEFrameLowering FrameLowering;
4142
AIEInstrInfo InstrInfo;
4243
AIERegisterInfo RegInfo;
@@ -117,6 +118,7 @@ class AIESubtarget final : public AIEGenSubtargetInfo, public AIEBaseSubtarget {
117118
const LegalizerInfo *getLegalizerInfo() const override;
118119
const RegisterBankInfo *getRegBankInfo() const override;
119120
InstructionSelector *getInstructionSelector() const override;
121+
const AIEBaseAddrSpaceInfo &getAddrSpaceInfo() const override;
120122
};
121123
} // namespace llvm
122124

0 commit comments

Comments
 (0)