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- Evaluation board product page: [ EVAL-AD916X-FMCZ] ( https://www.analog.com/eval-ad916x )
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- System documentation: to be added
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- HDL project documentation: https://analogdevicesinc.github.io/hdl/projects/ad916x_fmc/index.html
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+ - Evaluation board VADJ range: 1.2V - 1.8V
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## Supported parts
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## Building the project
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- Please enter the folder for the FPGA carrier you want to use and read the README.md.
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+ Please enter the folder for the FPGA carrier you want to use and read the README.md.
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- # AD916x-FMC/ZCU102 HDL Project
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+ <!-- no_no_os -->
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+ # AD916X-FMC/ZCU102 HDL Project
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## Building the project
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+ - VADJ with which it was tested in hardware: 1.8V
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The parameters configurable through the ` make ` command, can be found below.
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```
@@ -83,4 +87,4 @@ make ADI_DAC_MODE=08 ADI_DAC_DEVICE=AD9164 ADI_LANE_RATE=12.5
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For this mode Lane rate = 12.5 Gbps.
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- Corresponding device tree: [ zynqmp-zcu102-rev10-ad9164-fmc-ebz_m2_s2.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9164-fmc-ebz_m2_s2.dts )
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+ Corresponding device tree: [ zynqmp-zcu102-rev10-ad9164-fmc-ebz_m2_s2.dts] ( https://github.com/analogdevicesinc/linux/blob/main/arch/arm64/boot/dts/xilinx/zynqmp-zcu102-rev10-ad9164-fmc-ebz_m2_s2.dts )
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