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projects/cn0577: Update READMEs with newly supported eval kits
Signed-off-by: Iulia Moldovan <Iulia.Moldovan@analog.com>
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projects/cn0577/README.md

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# CN0577 HDL Project
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- Evaluation board product page: [EVAL-CN0577](https://www.analog.com/cn0577)
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- Evaluation board product page:
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- [EVAL-CN0577](https://www.analog.com/cn0577)
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- [EVAL-ADAQ23878](https://analog.com/eval-adaq23878)
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- [EVAL-ADAQ23876](https://analog.com/eval-adaq23876)
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- [EVAL-ADAQ23875](https://analog.com/eval-adaq23875)
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- System documentation: https://wiki.analog.com/resources/eval/user-guides/circuits-from-the-lab/cn0577
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- HDL project documentation: http://analogdevicesinc.github.io/hdl/projects/cn0577/index.html
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- Evaluation board VADJ: 2.5V
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| Part name | Description |
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|-----------------------------------------|-----------------------------------------------------------|
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| [ADAQ23876](https://www.analog.com/ADAQ23876) | 16-Bit, 15 MSPS, μModule Data Acquisition Solution |
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| [LTC2387-18](https://www.analog.com/LTC2387-18) | 18-Bit, 15 MSPS, SAR ADC |
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| [LTC2387-16](https://www.analog.com/LTC2387-16) | 16-Bit, 15 MSPS, SAR ADC |
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| [ADAQ23878](https://www.analog.com/ADAQ23878) | 18-Bit, 15 MSPS, μModule Data Acquisition Solution |
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| [ADAQ23876](https://www.analog.com/ADAQ23876) | 16-Bit, 15 MSPS, μModule Data Acquisition Solution |
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| [ADAQ23875](https://www.analog.com/ADAQ23875) | 16-Bit, 15 MSPS, μModule Data Acquisition Solution |
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## Building the project
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projects/cn0577/zed/README.md

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<!-- no_build_example, no_no_os -->
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<!-- no_no_os -->
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# CN0577/ZED HDL Project
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- VADJ with which it was tested in hardware: 2.5V
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## Building the project
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The parameters configurable through the ``make`` command, can be found below, as well as in the **system_project.tcl** file; it contains the default configuration.
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```
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cd projects/cn0577/zed
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make
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```
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The overwritable parameters from the environment are:
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- TWOLANES: whether to use two lanes or one lane mode;
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- 1 - two-lane mode used (default)
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- 0 - one-lane mode used
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- ADC_RES: the resolution of the ADC input data;
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- 18 - the resolution is 18 bits (default)
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- 16 - the resolution is 16 bits
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### Example configurations
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#### Two lanes, 18-bit resolution (default)
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This specific command is equivalent to running `make` only:
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```
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make TWOLANES=1 \
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ADC_RES=18
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```
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Corresponding device tree: [zynq-zed-adv7511-cn0577.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-cn0577.dts)
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#### One lane, 18-bit resolution
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```
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make TWOLANES=0 \
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ADC_RES=18
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```
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#### Two lanes, 16-bit resolution
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```
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make TWOLANES=1 \
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ADC_RES=16
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```
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Corresponding device tree: [zynq-zed-adv7511-adaq23875.dts](https://github.com/analogdevicesinc/linux/blob/main/arch/arm/boot/dts/xilinx/zynq-zed-adv7511-adaq23875.dts)
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#### One lane, 16-bit resolution
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```
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make TWOLANES=0 \
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ADC_RES=16
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```

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