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cargo clippy
1 parent f78090b commit c867c5b

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19 files changed

+207
-207
lines changed

19 files changed

+207
-207
lines changed

.github/workflows/checks.yml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -25,7 +25,7 @@ jobs:
2525
- name: Install cargo-clippy
2626
run: rustup component add --toolchain 1.85-x86_64-unknown-linux-gnu clippy
2727
- name: Run Cargo clippy
28-
run: cargo clippy --no-deps --all-targets $CARGOFLAGS -- -Dwarnings
28+
run: cargo clippy --no-deps $CARGOFLAGS -- -Dwarnings
2929

3030
udeps:
3131
name: Check unused dependencies

src/circuits/bigint/add.rs

Lines changed: 29 additions & 33 deletions
Original file line numberDiff line numberDiff line change
@@ -46,22 +46,20 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
4646
circuit.add(Gate::not(a[i].clone(), wire.clone()));
4747
circuit.add_wire(wire);
4848
carry = a[i].clone();
49+
} else if b_bits[i] {
50+
let wire_1 = Rc::new(RefCell::new(Wire::new()));
51+
let wire_2 = Rc::new(RefCell::new(Wire::new()));
52+
circuit.add(Gate::xnor(a[i].clone(), carry.clone(), wire_1.clone()));
53+
circuit.add(Gate::or(a[i].clone(), carry.clone(), wire_2.clone()));
54+
circuit.add_wire(wire_1);
55+
carry = wire_2;
4956
} else {
50-
if b_bits[i] {
51-
let wire_1 = Rc::new(RefCell::new(Wire::new()));
52-
let wire_2 = Rc::new(RefCell::new(Wire::new()));
53-
circuit.add(Gate::xnor(a[i].clone(), carry.clone(), wire_1.clone()));
54-
circuit.add(Gate::or(a[i].clone(), carry.clone(), wire_2.clone()));
55-
circuit.add_wire(wire_1);
56-
carry = wire_2;
57-
} else {
58-
let wire_1 = Rc::new(RefCell::new(Wire::new()));
59-
let wire_2 = Rc::new(RefCell::new(Wire::new()));
60-
circuit.add(Gate::xor(a[i].clone(), carry.clone(), wire_1.clone()));
61-
circuit.add(Gate::and(a[i].clone(), carry.clone(), wire_2.clone()));
62-
circuit.add_wire(wire_1);
63-
carry = wire_2;
64-
}
57+
let wire_1 = Rc::new(RefCell::new(Wire::new()));
58+
let wire_2 = Rc::new(RefCell::new(Wire::new()));
59+
circuit.add(Gate::xor(a[i].clone(), carry.clone(), wire_1.clone()));
60+
circuit.add(Gate::and(a[i].clone(), carry.clone(), wire_2.clone()));
61+
circuit.add_wire(wire_1);
62+
carry = wire_2;
6563
}
6664
}
6765
circuit.add_wire(carry);
@@ -104,22 +102,20 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
104102
circuit.add(Gate::not(a[i].clone(), wire.clone()));
105103
circuit.add_wire(wire);
106104
carry = a[i].clone();
105+
} else if b_bits[i] {
106+
let wire_1 = Rc::new(RefCell::new(Wire::new()));
107+
let wire_2 = Rc::new(RefCell::new(Wire::new()));
108+
circuit.add(Gate::xnor(a[i].clone(), carry.clone(), wire_1.clone()));
109+
circuit.add(Gate::or(a[i].clone(), carry.clone(), wire_2.clone()));
110+
circuit.add_wire(wire_1);
111+
carry = wire_2;
107112
} else {
108-
if b_bits[i] {
109-
let wire_1 = Rc::new(RefCell::new(Wire::new()));
110-
let wire_2 = Rc::new(RefCell::new(Wire::new()));
111-
circuit.add(Gate::xnor(a[i].clone(), carry.clone(), wire_1.clone()));
112-
circuit.add(Gate::or(a[i].clone(), carry.clone(), wire_2.clone()));
113-
circuit.add_wire(wire_1);
114-
carry = wire_2;
115-
} else {
116-
let wire_1 = Rc::new(RefCell::new(Wire::new()));
117-
let wire_2 = Rc::new(RefCell::new(Wire::new()));
118-
circuit.add(Gate::xor(a[i].clone(), carry.clone(), wire_1.clone()));
119-
circuit.add(Gate::and(a[i].clone(), carry.clone(), wire_2.clone()));
120-
circuit.add_wire(wire_1);
121-
carry = wire_2;
122-
}
113+
let wire_1 = Rc::new(RefCell::new(Wire::new()));
114+
let wire_2 = Rc::new(RefCell::new(Wire::new()));
115+
circuit.add(Gate::xor(a[i].clone(), carry.clone(), wire_1.clone()));
116+
circuit.add(Gate::and(a[i].clone(), carry.clone(), wire_2.clone()));
117+
circuit.add_wire(wire_1);
118+
carry = wire_2;
123119
}
124120
}
125121
circuit
@@ -291,7 +287,7 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
291287
circuit.add_wire(bound_check_wire);
292288
}
293289

294-
return circuit;
290+
circuit
295291
}
296292
}
297293

@@ -428,9 +424,9 @@ mod tests {
428424
gate.evaluate();
429425
}
430426
if a < b {
431-
assert_eq!(bound_check.borrow().get_value(), false);
427+
assert!(!bound_check.borrow().get_value());
432428
} else {
433-
assert_eq!(bound_check.borrow().get_value(), true);
429+
assert!(bound_check.borrow().get_value());
434430
let result = biguint_from_bits(
435431
output_wires
436432
.iter()

src/circuits/bigint/cmp.rs

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -115,7 +115,7 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
115115
bit_wires.push(Rc::new(RefCell::new(Wire::new())));
116116
bit_wires[i].borrow_mut().set(bits[i]);
117117
}
118-
return Self::self_or_zero(bit_wires, s);
118+
Self::self_or_zero(bit_wires, s)
119119
}
120120

121121
pub fn multiplexer(a: Vec<Wires>, s: Wires, w: usize) -> Circuit {
@@ -171,7 +171,7 @@ mod tests {
171171
for mut gate in circuit.1 {
172172
gate.evaluate();
173173
}
174-
assert_eq!(true, circuit.0[0].borrow().get_value());
174+
assert!(circuit.0[0].borrow().get_value());
175175

176176
let a = random_u254();
177177
let circuit = U254::equal_constant(wires_set_from_u254(a.clone()), b.clone());
@@ -205,7 +205,7 @@ mod tests {
205205
for mut gate in circuit.1 {
206206
gate.evaluate();
207207
}
208-
assert_eq!(false, circuit.0[0].borrow().get_value());
208+
assert!(!circuit.0[0].borrow().get_value());
209209

210210
let a = random_u254();
211211
let circuit = U254::greater_than(
@@ -216,7 +216,7 @@ mod tests {
216216
for mut gate in circuit.1 {
217217
gate.evaluate();
218218
}
219-
assert_eq!(true, circuit.0[0].borrow().get_value());
219+
assert!(circuit.0[0].borrow().get_value());
220220
}
221221

222222
#[test]

src/circuits/bigint/mul.rs

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
2727
circuit.0[j] = new_bits[j - i].clone();
2828
}
2929
}
30-
return circuit;
30+
circuit
3131
}
3232

3333
///Assuming constant is smaller than 2^N_BITS, and returns 2 * N_BITS result for now (can be optimized)
@@ -81,7 +81,7 @@ impl<const N_BITS: usize> BigIntImpl<N_BITS> {
8181
}
8282
}
8383
*/
84-
return circuit;
84+
circuit
8585
}
8686
}
8787

src/circuits/bigint/utils.rs

Lines changed: 9 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -65,17 +65,15 @@ pub fn change_to_neg_pos_decomposition(bits: Vec<bool>) -> Vec<i8> {
6565
for i in 0..len {
6666
if !bits[i] {
6767
l = -1;
68-
} else {
69-
if i == len - 1 || !bits[i + 1] {
70-
if l == -1 {
71-
res[i] = 1;
72-
} else {
73-
res[i + 1] = 1;
74-
res[l as usize] = -1;
75-
}
76-
} else if l == -1 {
77-
l = i as i32;
68+
} else if i == len - 1 || !bits[i + 1] {
69+
if l == -1 {
70+
res[i] = 1;
71+
} else {
72+
res[i + 1] = 1;
73+
res[l as usize] = -1;
7874
}
75+
} else if l == -1 {
76+
l = i as i32;
7977
}
8078
}
8179

@@ -84,7 +82,7 @@ pub fn change_to_neg_pos_decomposition(bits: Vec<bool>) -> Vec<i8> {
8482
len -= 1;
8583
}
8684

87-
return res;
85+
res
8886
}
8987

9088
#[cfg(test)]

src/circuits/bn254/finalexp.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@ pub fn cyclotomic_exp(f: ark_bn254::Fq12) -> ark_bn254::Fq12 {
1616
let mut res = ark_bn254::Fq12::ONE;
1717
let mut found_nonzero = false;
1818
for value in
19-
BitIteratorBE::without_leading_zeros(ark_bn254::Config::X.as_ref()).map(|e| e as i8)
19+
BitIteratorBE::without_leading_zeros(ark_bn254::Config::X).map(|e| e as i8)
2020
{
2121
if found_nonzero {
2222
res.square_in_place(); // cyclotomic_square_in_place
@@ -37,7 +37,7 @@ pub fn cyclotomic_exp_evaluate_fast(f: Wires) -> (Wires, GateCount) {
3737
let mut res = wires_set_from_fq12(ark_bn254::Fq12::ONE);
3838
let mut gate_count = GateCount::zero();
3939
let mut found_nonzero = false;
40-
for value in BitIteratorBE::without_leading_zeros(ark_bn254::Config::X.as_ref())
40+
for value in BitIteratorBE::without_leading_zeros(ark_bn254::Config::X)
4141
.map(|e| e as i8)
4242
.collect::<Vec<_>>()
4343
{
@@ -70,7 +70,7 @@ pub fn cyclotomic_exp_fastinv(f: ark_bn254::Fq12) -> ark_bn254::Fq12 {
7070
let self_inverse = f.cyclotomic_inverse().unwrap();
7171
let mut res = ark_bn254::Fq12::ONE;
7272
let mut found_nonzero = false;
73-
for value in ark_ff::biginteger::arithmetic::find_naf(ark_bn254::Config::X.as_ref())
73+
for value in ark_ff::biginteger::arithmetic::find_naf(ark_bn254::Config::X)
7474
.into_iter()
7575
.rev()
7676
{
@@ -128,8 +128,8 @@ pub fn final_exponentiation(f: ark_bn254::Fq12) -> ark_bn254::Fq12 {
128128
let r2 = conjugate(r);
129129
let y18 = r2 * &y11;
130130
let y19 = y18.frobenius_map(3);
131-
let y20 = y19 * &y17;
132-
y20
131+
132+
y19 * &y17
133133
}
134134

135135
pub fn final_exponentiation_evaluate_fast(f: Wires) -> (Wires, GateCount) {

src/circuits/bn254/fp254impl.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -535,6 +535,6 @@ pub trait Fp254Impl {
535535
let result = circuit.extend(U254::optimized_sub(x_high, new_sub, false));
536536
circuit.add_wires(result);
537537

538-
return circuit;
538+
circuit
539539
}
540540
}

src/circuits/bn254/fq.rs

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@ mod tests {
3535
fn test_fq_add() {
3636
let a = random_fq();
3737
let b = random_fq();
38-
let circuit = Fq::add(wires_set_from_fq(a.clone()), wires_set_from_fq(b.clone()));
38+
let circuit = Fq::add(wires_set_from_fq(a), wires_set_from_fq(b));
3939
circuit.gate_counts().print();
4040
for mut gate in circuit.1 {
4141
gate.evaluate();
@@ -48,7 +48,7 @@ mod tests {
4848
fn test_fq_add_constant() {
4949
let a = random_fq();
5050
let b = random_fq();
51-
let circuit = Fq::add_constant(wires_set_from_fq(a.clone()), b.clone());
51+
let circuit = Fq::add_constant(wires_set_from_fq(a), b);
5252
circuit.gate_counts().print();
5353
for mut gate in circuit.1 {
5454
gate.evaluate();
@@ -60,7 +60,7 @@ mod tests {
6060
#[test]
6161
fn test_fq_neg() {
6262
let a = random_fq();
63-
let circuit = Fq::neg(wires_set_from_fq(a.clone()));
63+
let circuit = Fq::neg(wires_set_from_fq(a));
6464
circuit.gate_counts().print();
6565
for mut gate in circuit.1 {
6666
gate.evaluate();
@@ -73,7 +73,7 @@ mod tests {
7373
fn test_fq_sub() {
7474
let a = random_fq();
7575
let b = random_fq();
76-
let circuit = Fq::sub(wires_set_from_fq(a.clone()), wires_set_from_fq(b.clone()));
76+
let circuit = Fq::sub(wires_set_from_fq(a), wires_set_from_fq(b));
7777
circuit.gate_counts().print();
7878
for mut gate in circuit.1 {
7979
gate.evaluate();
@@ -85,7 +85,7 @@ mod tests {
8585
#[test]
8686
fn test_fq_double() {
8787
let a = random_fq();
88-
let circuit = Fq::double(wires_set_from_fq(a.clone()));
88+
let circuit = Fq::double(wires_set_from_fq(a));
8989
circuit.gate_counts().print();
9090
for mut gate in circuit.1 {
9191
gate.evaluate();
@@ -97,7 +97,7 @@ mod tests {
9797
#[test]
9898
fn test_fq_half() {
9999
let a = random_fq();
100-
let circuit = Fq::half(wires_set_from_fq(a.clone()));
100+
let circuit = Fq::half(wires_set_from_fq(a));
101101
circuit.gate_counts().print();
102102
for mut gate in circuit.1 {
103103
gate.evaluate();
@@ -109,7 +109,7 @@ mod tests {
109109
#[test]
110110
fn test_fq_triple() {
111111
let a = random_fq();
112-
let circuit = Fq::triple(wires_set_from_fq(a.clone()));
112+
let circuit = Fq::triple(wires_set_from_fq(a));
113113
circuit.gate_counts().print();
114114
for mut gate in circuit.1 {
115115
gate.evaluate();
@@ -122,7 +122,7 @@ mod tests {
122122
fn test_fq_mul() {
123123
let a = random_fq();
124124
let b = random_fq();
125-
let circuit = Fq::mul(wires_set_from_fq(a.clone()), wires_set_from_fq(b.clone()));
125+
let circuit = Fq::mul(wires_set_from_fq(a), wires_set_from_fq(b));
126126
circuit.gate_counts().print();
127127
for mut gate in circuit.1 {
128128
gate.evaluate();
@@ -151,7 +151,7 @@ mod tests {
151151
fn test_fq_mul_by_constant() {
152152
let a = random_fq();
153153
let b = random_fq();
154-
let circuit = Fq::mul_by_constant(wires_set_from_fq(a.clone()), b.clone());
154+
let circuit = Fq::mul_by_constant(wires_set_from_fq(a), b);
155155
circuit.gate_counts().print();
156156
for mut gate in circuit.1 {
157157
gate.evaluate();
@@ -163,7 +163,7 @@ mod tests {
163163
#[test]
164164
fn test_fq_square() {
165165
let a = random_fq();
166-
let circuit = Fq::square(wires_set_from_fq(a.clone()));
166+
let circuit = Fq::square(wires_set_from_fq(a));
167167
circuit.gate_counts().print();
168168
for mut gate in circuit.1 {
169169
gate.evaluate();
@@ -175,7 +175,7 @@ mod tests {
175175
#[test]
176176
fn test_fq_inverse() {
177177
let a = random_fq();
178-
let circuit = Fq::inverse(wires_set_from_fq(a.clone()));
178+
let circuit = Fq::inverse(wires_set_from_fq(a));
179179
circuit.gate_counts().print();
180180
for mut gate in circuit.1 {
181181
gate.evaluate();
@@ -187,7 +187,7 @@ mod tests {
187187
#[test]
188188
fn test_fq_div6() {
189189
let a = random_fq();
190-
let circuit = Fq::div6(wires_set_from_fq(a.clone()));
190+
let circuit = Fq::div6(wires_set_from_fq(a));
191191
circuit.gate_counts().print();
192192
for mut gate in circuit.1 {
193193
gate.evaluate();

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