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Use shared helper
1 parent dd7ca13 commit 239b9c0

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4 files changed

+26
-36
lines changed

4 files changed

+26
-36
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 2 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -17655,21 +17655,8 @@ atomicSupportedIfLegalIntType(const AtomicRMWInst *RMW) {
1765517655
static bool flatInstrMayAccessPrivate(const Instruction *I) {
1765617656
const MDNode *NoaliasAddrSpaceMD =
1765717657
I->getMetadata(LLVMContext::MD_noalias_addrspace);
17658-
if (!NoaliasAddrSpaceMD)
17659-
return true;
17660-
17661-
for (unsigned I = 0, E = NoaliasAddrSpaceMD->getNumOperands() / 2; I != E;
17662-
++I) {
17663-
auto *Low = mdconst::extract<ConstantInt>(
17664-
NoaliasAddrSpaceMD->getOperand(2 * I + 0));
17665-
if (Low->getValue().uge(AMDGPUAS::PRIVATE_ADDRESS)) {
17666-
auto *High = mdconst::extract<ConstantInt>(
17667-
NoaliasAddrSpaceMD->getOperand(2 * I + 1));
17668-
return High->getValue().ule(AMDGPUAS::PRIVATE_ADDRESS);
17669-
}
17670-
}
17671-
17672-
return true;
17658+
return !AMDGPU::hasValueInRange(NoaliasAddrSpaceMD,
17659+
AMDGPUAS::PRIVATE_ADDRESS);
1767317660
}
1767417661

1767517662
TargetLowering::AtomicExpansionKind

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 2 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -4249,24 +4249,6 @@ bool SIInstrInfo::isAlwaysGDS(uint16_t Opcode) const {
42494249
Opcode == AMDGPU::DS_SUB_GS_REG_RTN || isGWS(Opcode);
42504250
}
42514251

4252-
static bool hasNoAliasAddrSpaceScratch(const MachineMemOperand *MemOp) {
4253-
const MDNode *MD = MemOp->getAAInfo().NoAliasAddrSpace;
4254-
if (!MD)
4255-
return false;
4256-
4257-
// This MD is structured in ranges [A, B)
4258-
// Check if PRIVATE is included in any of them.
4259-
for (unsigned I = 0, E = MD->getNumOperands() / 2; I != E; ++I) {
4260-
auto *Low = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 0));
4261-
auto *High = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 1));
4262-
if (Low->getValue().ule(AMDGPUAS::PRIVATE_ADDRESS) &&
4263-
High->getValue().ugt(AMDGPUAS::PRIVATE_ADDRESS))
4264-
return true;
4265-
}
4266-
4267-
return false;
4268-
}
4269-
42704252
bool SIInstrInfo::mayAccessScratchThroughFlat(const MachineInstr &MI) const {
42714253
if (!isFLAT(MI) || isFLATGlobal(MI))
42724254
return false;
@@ -4284,13 +4266,12 @@ bool SIInstrInfo::mayAccessScratchThroughFlat(const MachineInstr &MI) const {
42844266
if (MI.memoperands_empty())
42854267
return true;
42864268

4287-
// TODO (?): Does this need to be taught how to read noalias.addrspace ?
4288-
42894269
// See if any memory operand specifies an address space that involves scratch.
42904270
return any_of(MI.memoperands(), [](const MachineMemOperand *Memop) {
42914271
unsigned AS = Memop->getAddrSpace();
42924272
if (AS == AMDGPUAS::FLAT_ADDRESS)
4293-
return !hasNoAliasAddrSpaceScratch(Memop);
4273+
return !AMDGPU::hasValueInRange(Memop->getAAInfo().NoAliasAddrSpace,
4274+
AMDGPUAS::PRIVATE_ADDRESS);
42944275
return AS == AMDGPUAS::PRIVATE_ADDRESS;
42954276
});
42964277
}

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121
#include "llvm/IR/IntrinsicsAMDGPU.h"
2222
#include "llvm/IR/IntrinsicsR600.h"
2323
#include "llvm/IR/LLVMContext.h"
24+
#include "llvm/IR/Metadata.h"
2425
#include "llvm/MC/MCInstrInfo.h"
2526
#include "llvm/MC/MCRegisterInfo.h"
2627
#include "llvm/MC/MCSubtargetInfo.h"
@@ -1630,6 +1631,22 @@ getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size) {
16301631
return Vals;
16311632
}
16321633

1634+
bool hasValueInRange(const MDNode *MD, unsigned Val) {
1635+
if (!MD)
1636+
return false;
1637+
1638+
assert((MD->getNumOperands() % 2 == 0) && "invalid number of operands!");
1639+
for (unsigned I = 0, E = MD->getNumOperands() / 2; I != E; ++I) {
1640+
auto *Low = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 0));
1641+
auto *High = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 1));
1642+
assert(Low->getValue().ult(High->getValue()) && "invalid range metadata!");
1643+
if (Low->getValue().ule(Val) && High->getValue().ugt(Val))
1644+
return true;
1645+
}
1646+
1647+
return false;
1648+
}
1649+
16331650
unsigned getVmcntBitMask(const IsaVersion &Version) {
16341651
return (1 << (getVmcntBitWidthLo(Version.Major) +
16351652
getVmcntBitWidthHi(Version.Major))) -

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ class MCInstrInfo;
3535
class MCRegisterClass;
3636
class MCRegisterInfo;
3737
class MCSubtargetInfo;
38+
class MDNode;
3839
class StringRef;
3940
class Triple;
4041
class raw_ostream;
@@ -1058,6 +1059,10 @@ SmallVector<unsigned> getIntegerVecAttribute(const Function &F, StringRef Name,
10581059
std::optional<SmallVector<unsigned>>
10591060
getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size);
10601061

1062+
/// Checks if \p Val is inside \p MD, a !range-like metadata.
1063+
/// Returns false if \p MD is null.
1064+
bool hasValueInRange(const MDNode *MD, unsigned Val);
1065+
10611066
/// Represents the counter values to wait for in an s_waitcnt instruction.
10621067
///
10631068
/// Large values (including the maximum possible integer) can be used to

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