Skip to content

Commit 4a44aa2

Browse files
committed
Use shared helper
1 parent 483cb20 commit 4a44aa2

File tree

4 files changed

+26
-36
lines changed

4 files changed

+26
-36
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 2 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -17648,21 +17648,8 @@ atomicSupportedIfLegalIntType(const AtomicRMWInst *RMW) {
1764817648
static bool flatInstrMayAccessPrivate(const Instruction *I) {
1764917649
const MDNode *NoaliasAddrSpaceMD =
1765017650
I->getMetadata(LLVMContext::MD_noalias_addrspace);
17651-
if (!NoaliasAddrSpaceMD)
17652-
return true;
17653-
17654-
for (unsigned I = 0, E = NoaliasAddrSpaceMD->getNumOperands() / 2; I != E;
17655-
++I) {
17656-
auto *Low = mdconst::extract<ConstantInt>(
17657-
NoaliasAddrSpaceMD->getOperand(2 * I + 0));
17658-
if (Low->getValue().uge(AMDGPUAS::PRIVATE_ADDRESS)) {
17659-
auto *High = mdconst::extract<ConstantInt>(
17660-
NoaliasAddrSpaceMD->getOperand(2 * I + 1));
17661-
return High->getValue().ule(AMDGPUAS::PRIVATE_ADDRESS);
17662-
}
17663-
}
17664-
17665-
return true;
17651+
return !AMDGPU::hasValueInRange(NoaliasAddrSpaceMD,
17652+
AMDGPUAS::PRIVATE_ADDRESS);
1766617653
}
1766717654

1766817655
TargetLowering::AtomicExpansionKind

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

Lines changed: 2 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -4249,24 +4249,6 @@ bool SIInstrInfo::isAlwaysGDS(uint16_t Opcode) const {
42494249
Opcode == AMDGPU::DS_SUB_GS_REG_RTN || isGWS(Opcode);
42504250
}
42514251

4252-
static bool hasNoAliasAddrSpaceScratch(const MachineMemOperand *MemOp) {
4253-
const MDNode *MD = MemOp->getAAInfo().NoAliasAddrSpace;
4254-
if (!MD)
4255-
return false;
4256-
4257-
// This MD is structured in ranges [A, B)
4258-
// Check if PRIVATE is included in any of them.
4259-
for (unsigned I = 0, E = MD->getNumOperands() / 2; I != E; ++I) {
4260-
auto *Low = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 0));
4261-
auto *High = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 1));
4262-
if (Low->getValue().ule(AMDGPUAS::PRIVATE_ADDRESS) &&
4263-
High->getValue().ugt(AMDGPUAS::PRIVATE_ADDRESS))
4264-
return true;
4265-
}
4266-
4267-
return false;
4268-
}
4269-
42704252
bool SIInstrInfo::mayAccessScratchThroughFlat(const MachineInstr &MI) const {
42714253
if (!isFLAT(MI) || isFLATGlobal(MI))
42724254
return false;
@@ -4284,13 +4266,12 @@ bool SIInstrInfo::mayAccessScratchThroughFlat(const MachineInstr &MI) const {
42844266
if (MI.memoperands_empty())
42854267
return true;
42864268

4287-
// TODO (?): Does this need to be taught how to read noalias.addrspace ?
4288-
42894269
// See if any memory operand specifies an address space that involves scratch.
42904270
return any_of(MI.memoperands(), [](const MachineMemOperand *Memop) {
42914271
unsigned AS = Memop->getAddrSpace();
42924272
if (AS == AMDGPUAS::FLAT_ADDRESS)
4293-
return !hasNoAliasAddrSpaceScratch(Memop);
4273+
return !AMDGPU::hasValueInRange(Memop->getAAInfo().NoAliasAddrSpace,
4274+
AMDGPUAS::PRIVATE_ADDRESS);
42944275
return AS == AMDGPUAS::PRIVATE_ADDRESS;
42954276
});
42964277
}

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@
2121
#include "llvm/IR/IntrinsicsAMDGPU.h"
2222
#include "llvm/IR/IntrinsicsR600.h"
2323
#include "llvm/IR/LLVMContext.h"
24+
#include "llvm/IR/Metadata.h"
2425
#include "llvm/MC/MCInstrInfo.h"
2526
#include "llvm/MC/MCRegisterInfo.h"
2627
#include "llvm/MC/MCSubtargetInfo.h"
@@ -1666,6 +1667,22 @@ getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size) {
16661667
return Vals;
16671668
}
16681669

1670+
bool hasValueInRange(const MDNode *MD, unsigned Val) {
1671+
if (!MD)
1672+
return false;
1673+
1674+
assert((MD->getNumOperands() % 2 == 0) && "invalid number of operands!");
1675+
for (unsigned I = 0, E = MD->getNumOperands() / 2; I != E; ++I) {
1676+
auto *Low = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 0));
1677+
auto *High = mdconst::extract<ConstantInt>(MD->getOperand(2 * I + 1));
1678+
assert(Low->getValue().ult(High->getValue()) && "invalid range metadata!");
1679+
if (Low->getValue().ule(Val) && High->getValue().ugt(Val))
1680+
return true;
1681+
}
1682+
1683+
return false;
1684+
}
1685+
16691686
unsigned getVmcntBitMask(const IsaVersion &Version) {
16701687
return (1 << (getVmcntBitWidthLo(Version.Major) +
16711688
getVmcntBitWidthHi(Version.Major))) -

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@ class MCInstrInfo;
3535
class MCRegisterClass;
3636
class MCRegisterInfo;
3737
class MCSubtargetInfo;
38+
class MDNode;
3839
class StringRef;
3940
class Triple;
4041
class raw_ostream;
@@ -1064,6 +1065,10 @@ SmallVector<unsigned> getIntegerVecAttribute(const Function &F, StringRef Name,
10641065
std::optional<SmallVector<unsigned>>
10651066
getIntegerVecAttribute(const Function &F, StringRef Name, unsigned Size);
10661067

1068+
/// Checks if \p Val is inside \p MD, a !range-like metadata.
1069+
/// Returns false if \p MD is null.
1070+
bool hasValueInRange(const MDNode *MD, unsigned Val);
1071+
10671072
/// Represents the counter values to wait for in an s_waitcnt instruction.
10681073
///
10691074
/// Large values (including the maximum possible integer) can be used to

0 commit comments

Comments
 (0)