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[Test] Add and update tests for lrint
A number of backends are missing either all tests for lrint, or specifically those for f16 which currently crashes for `softPromoteHalf` targets. For a number of popular backends, do the following: * Ensure f16, f32, f64, and f128 are all covered * Ensure both a 32- and 64-bit target are tested, if relevant * Add `nounwind` to clean up CFI output * Add a test covering the above if one did not exist
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16 files changed

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‎llvm/test/CodeGen/ARM/llrint-conv.ll

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,16 @@
11
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
22
; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
33

4+
; SOFTFP-LABEL: testmsxh_builtin:
5+
; SOFTFP: bl llrintf
6+
; HARDFP-LABEL: testmsxh_builtin:
7+
; HARDFP: bl llrintf
8+
define i64 @testmsxh_builtin(half %x) {
9+
entry:
10+
%0 = tail call i64 @llvm.llrint.f16(half %x)
11+
ret i64 %0
12+
}
13+
414
; SOFTFP-LABEL: testmsxs_builtin:
515
; SOFTFP: bl llrintf
616
; HARDFP-LABEL: testmsxs_builtin:
@@ -21,5 +31,15 @@ entry:
2131
ret i64 %0
2232
}
2333

34+
; SOFTFP-LABEL: testmsxq_builtin:
35+
; SOFTFP: bl llrintl
36+
; HARDFP-LABEL: testmsxq_builtin:
37+
; HARDFP: bl llrintl
38+
define i64 @testmsxq_builtin(fp128 %x) {
39+
entry:
40+
%0 = tail call i64 @llvm.llrint.f128(fp128 %x)
41+
ret i64 %0
42+
}
43+
2444
declare i64 @llvm.llrint.f32(float) nounwind readnone
2545
declare i64 @llvm.llrint.f64(double) nounwind readnone

‎llvm/test/CodeGen/ARM/lrint-conv.ll

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,13 @@
11
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
22
; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
33

4+
; FIXME: crash
5+
; define i32 @testmswh_builtin(half %x) {
6+
; entry:
7+
; %0 = tail call i32 @llvm.lrint.i32.f16(half %x)
8+
; ret i32 %0
9+
; }
10+
411
; SOFTFP-LABEL: testmsws_builtin:
512
; SOFTFP: bl lrintf
613
; HARDFP-LABEL: testmsws_builtin:
@@ -21,5 +28,16 @@ entry:
2128
ret i32 %0
2229
}
2330

31+
; FIXME(#44744): incorrect libcall
32+
; SOFTFP-LABEL: testmswq_builtin:
33+
; SOFTFP: bl lrintl
34+
; HARDFP-LABEL: testmswq_builtin:
35+
; HARDFP: bl lrintl
36+
define i32 @testmswq_builtin(fp128 %x) {
37+
entry:
38+
%0 = tail call i32 @llvm.lrint.i32.f128(fp128 %x)
39+
ret i32 %0
40+
}
41+
2442
declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
2543
declare i32 @llvm.lrint.i32.f64(double) nounwind readnone

‎llvm/test/CodeGen/AVR/llrint.ll

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,13 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s
33

4+
; FIXME: crash
5+
; define i64 @testmsxh_builtin(half %x) {
6+
; entry:
7+
; %0 = tail call i64 @llvm.llrint.f16(half %x)
8+
; ret i64 %0
9+
; }
10+
411
define i64 @testmsxs_builtin(float %x) {
512
; CHECK-LABEL: testmsxs_builtin:
613
; CHECK: ; %bb.0: ; %entry
@@ -21,5 +28,16 @@ entry:
2128
ret i64 %0
2229
}
2330

31+
; FIXME(#44744): incorrect libcall
32+
define i64 @testmsxq_builtin(fp128 %x) {
33+
; CHECK-LABEL: testmsxq_builtin:
34+
; CHECK: ; %bb.0: ; %entry
35+
; CHECK-NEXT: call llrintl
36+
; CHECK-NEXT: ret
37+
entry:
38+
%0 = tail call i64 @llvm.llrint.fp128(fp128 %x)
39+
ret i64 %0
40+
}
41+
2442
declare i64 @llvm.llrint.f32(float) nounwind readnone
2543
declare i64 @llvm.llrint.f64(double) nounwind readnone

‎llvm/test/CodeGen/AVR/lrint.ll

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,13 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
22
; RUN: llc < %s -mtriple=avr -mcpu=atmega328p | FileCheck %s
33

4+
; FIXME: crash
5+
; define i32 @testmswh_builtin(half %x) {
6+
; entry:
7+
; %0 = tail call i32 @llvm.lrint.i32.f16(half %x)
8+
; ret i32 %0
9+
; }
10+
411
define i32 @testmsws_builtin(float %x) {
512
; CHECK-LABEL: testmsws_builtin:
613
; CHECK: ; %bb.0: ; %entry
@@ -21,5 +28,15 @@ entry:
2128
ret i32 %0
2229
}
2330

31+
define i32 @testmswq_builtin(fp128 %x) {
32+
; CHECK-LABEL: testmswq_builtin:
33+
; CHECK: ; %bb.0: ; %entry
34+
; CHECK-NEXT: call lrint
35+
; CHECK-NEXT: ret
36+
entry:
37+
%0 = tail call i32 @llvm.lrint.i32.fp128(fp128 %x)
38+
ret i32 %0
39+
}
40+
2441
declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
2542
declare i32 @llvm.lrint.i32.f64(double) nounwind readnone

‎llvm/test/CodeGen/LoongArch/lrint-conv.ll

Lines changed: 267 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,267 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2+
3+
; Tests for lrint and llrint, with both i32 and i64 checked.
4+
5+
; RUN: sed 's/ITy/i32/g' %s | llc -mtriple=loongarch32 -mattr=+d | FileCheck %s --check-prefixes=LA32-I32
6+
; RUN: sed 's/ITy/i64/g' %s | llc -mtriple=loongarch32 -mattr=+d | FileCheck %s --check-prefixes=LA32-I64
7+
; RUN: sed 's/ITy/i32/g' %s | llc -mtriple=loongarch64 -mattr=+d | FileCheck %s --check-prefixes=LA64-I32
8+
; RUN: sed 's/ITy/i64/g' %s | llc -mtriple=loongarch64 -mattr=+d | FileCheck %s --check-prefixes=LA64-I64
9+
10+
; FIXME: crash
11+
; define ITy @test_lrint_ixx_f16(half %x) nounwind {
12+
; %res = tail call ITy @llvm.lrint.ITy.f16(half %x)
13+
; ret ITy %res
14+
; }
15+
16+
; define ITy @test_llrint_ixx_f16(half %x) nounwind {
17+
; %res = tail call ITy @llvm.llrint.ITy.f16(half %x)
18+
; ret ITy %res
19+
; }
20+
21+
define ITy @test_lrint_ixx_f32(float %x) nounwind {
22+
; LA32-I32-LABEL: test_lrint_ixx_f32:
23+
; LA32-I32: # %bb.0:
24+
; LA32-I32-NEXT: b lrintf
25+
;
26+
; LA32-I64-LABEL: test_lrint_ixx_f32:
27+
; LA32-I64: # %bb.0:
28+
; LA32-I64-NEXT: addi.w $sp, $sp, -16
29+
; LA32-I64-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
30+
; LA32-I64-NEXT: bl lrintf
31+
; LA32-I64-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
32+
; LA32-I64-NEXT: addi.w $sp, $sp, 16
33+
; LA32-I64-NEXT: ret
34+
;
35+
; LA64-I32-LABEL: test_lrint_ixx_f32:
36+
; LA64-I32: # %bb.0:
37+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
38+
; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
39+
; LA64-I32-NEXT: pcaddu18i $ra, %call36(lrintf)
40+
; LA64-I32-NEXT: jirl $ra, $ra, 0
41+
; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
42+
; LA64-I32-NEXT: addi.d $sp, $sp, 16
43+
; LA64-I32-NEXT: ret
44+
;
45+
; LA64-I64-LABEL: test_lrint_ixx_f32:
46+
; LA64-I64: # %bb.0:
47+
; LA64-I64-NEXT: pcaddu18i $t8, %call36(lrintf)
48+
; LA64-I64-NEXT: jr $t8
49+
%res = tail call ITy @llvm.lrint.ITy.f32(float %x)
50+
ret ITy %res
51+
}
52+
53+
define ITy @test_llrint_ixx_f32(float %x) nounwind {
54+
; LA32-I32-LABEL: test_llrint_ixx_f32:
55+
; LA32-I32: # %bb.0:
56+
; LA32-I32-NEXT: b llrintf
57+
;
58+
; LA32-I64-LABEL: test_llrint_ixx_f32:
59+
; LA32-I64: # %bb.0:
60+
; LA32-I64-NEXT: addi.w $sp, $sp, -16
61+
; LA32-I64-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
62+
; LA32-I64-NEXT: bl llrintf
63+
; LA32-I64-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
64+
; LA32-I64-NEXT: addi.w $sp, $sp, 16
65+
; LA32-I64-NEXT: ret
66+
;
67+
; LA64-I32-LABEL: test_llrint_ixx_f32:
68+
; LA64-I32: # %bb.0:
69+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
70+
; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
71+
; LA64-I32-NEXT: pcaddu18i $ra, %call36(llrintf)
72+
; LA64-I32-NEXT: jirl $ra, $ra, 0
73+
; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
74+
; LA64-I32-NEXT: addi.d $sp, $sp, 16
75+
; LA64-I32-NEXT: ret
76+
;
77+
; LA64-I64-LABEL: test_llrint_ixx_f32:
78+
; LA64-I64: # %bb.0:
79+
; LA64-I64-NEXT: pcaddu18i $t8, %call36(llrintf)
80+
; LA64-I64-NEXT: jr $t8
81+
%res = tail call ITy @llvm.llrint.ITy.f32(float %x)
82+
ret ITy %res
83+
}
84+
85+
define ITy @test_lrint_ixx_f64(double %x) nounwind {
86+
; LA32-I32-LABEL: test_lrint_ixx_f64:
87+
; LA32-I32: # %bb.0:
88+
; LA32-I32-NEXT: b lrint
89+
;
90+
; LA32-I64-LABEL: test_lrint_ixx_f64:
91+
; LA32-I64: # %bb.0:
92+
; LA32-I64-NEXT: addi.w $sp, $sp, -16
93+
; LA32-I64-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
94+
; LA32-I64-NEXT: bl lrint
95+
; LA32-I64-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
96+
; LA32-I64-NEXT: addi.w $sp, $sp, 16
97+
; LA32-I64-NEXT: ret
98+
;
99+
; LA64-I32-LABEL: test_lrint_ixx_f64:
100+
; LA64-I32: # %bb.0:
101+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
102+
; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
103+
; LA64-I32-NEXT: pcaddu18i $ra, %call36(lrint)
104+
; LA64-I32-NEXT: jirl $ra, $ra, 0
105+
; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
106+
; LA64-I32-NEXT: addi.d $sp, $sp, 16
107+
; LA64-I32-NEXT: ret
108+
;
109+
; LA64-I64-LABEL: test_lrint_ixx_f64:
110+
; LA64-I64: # %bb.0:
111+
; LA64-I64-NEXT: pcaddu18i $t8, %call36(lrint)
112+
; LA64-I64-NEXT: jr $t8
113+
%res = tail call ITy @llvm.lrint.ITy.f64(double %x)
114+
ret ITy %res
115+
}
116+
117+
define ITy @test_llrint_ixx_f64(double %x) nounwind {
118+
; LA32-I32-LABEL: test_llrint_ixx_f64:
119+
; LA32-I32: # %bb.0:
120+
; LA32-I32-NEXT: b llrint
121+
;
122+
; LA32-I64-LABEL: test_llrint_ixx_f64:
123+
; LA32-I64: # %bb.0:
124+
; LA32-I64-NEXT: addi.w $sp, $sp, -16
125+
; LA32-I64-NEXT: st.w $ra, $sp, 12 # 4-byte Folded Spill
126+
; LA32-I64-NEXT: bl llrint
127+
; LA32-I64-NEXT: ld.w $ra, $sp, 12 # 4-byte Folded Reload
128+
; LA32-I64-NEXT: addi.w $sp, $sp, 16
129+
; LA32-I64-NEXT: ret
130+
;
131+
; LA64-I32-LABEL: test_llrint_ixx_f64:
132+
; LA64-I32: # %bb.0:
133+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
134+
; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
135+
; LA64-I32-NEXT: pcaddu18i $ra, %call36(llrint)
136+
; LA64-I32-NEXT: jirl $ra, $ra, 0
137+
; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
138+
; LA64-I32-NEXT: addi.d $sp, $sp, 16
139+
; LA64-I32-NEXT: ret
140+
;
141+
; LA64-I64-LABEL: test_llrint_ixx_f64:
142+
; LA64-I64: # %bb.0:
143+
; LA64-I64-NEXT: pcaddu18i $t8, %call36(llrint)
144+
; LA64-I64-NEXT: jr $t8
145+
%res = tail call ITy @llvm.llrint.ITy.f64(double %x)
146+
ret ITy %res
147+
}
148+
149+
define ITy @test_lrint_ixx_f128(fp128 %x) nounwind {
150+
; LA32-I32-LABEL: test_lrint_ixx_f128:
151+
; LA32-I32: # %bb.0:
152+
; LA32-I32-NEXT: addi.w $sp, $sp, -32
153+
; LA32-I32-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
154+
; LA32-I32-NEXT: ld.w $a1, $a0, 0
155+
; LA32-I32-NEXT: ld.w $a2, $a0, 4
156+
; LA32-I32-NEXT: ld.w $a3, $a0, 8
157+
; LA32-I32-NEXT: ld.w $a0, $a0, 12
158+
; LA32-I32-NEXT: st.w $a0, $sp, 20
159+
; LA32-I32-NEXT: st.w $a3, $sp, 16
160+
; LA32-I32-NEXT: st.w $a2, $sp, 12
161+
; LA32-I32-NEXT: addi.w $a0, $sp, 8
162+
; LA32-I32-NEXT: st.w $a1, $sp, 8
163+
; LA32-I32-NEXT: bl lrintl
164+
; LA32-I32-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
165+
; LA32-I32-NEXT: addi.w $sp, $sp, 32
166+
; LA32-I32-NEXT: ret
167+
;
168+
; LA32-I64-LABEL: test_lrint_ixx_f128:
169+
; LA32-I64: # %bb.0:
170+
; LA32-I64-NEXT: addi.w $sp, $sp, -32
171+
; LA32-I64-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
172+
; LA32-I64-NEXT: ld.w $a1, $a0, 0
173+
; LA32-I64-NEXT: ld.w $a2, $a0, 4
174+
; LA32-I64-NEXT: ld.w $a3, $a0, 8
175+
; LA32-I64-NEXT: ld.w $a0, $a0, 12
176+
; LA32-I64-NEXT: st.w $a0, $sp, 12
177+
; LA32-I64-NEXT: st.w $a3, $sp, 8
178+
; LA32-I64-NEXT: st.w $a2, $sp, 4
179+
; LA32-I64-NEXT: addi.w $a0, $sp, 0
180+
; LA32-I64-NEXT: st.w $a1, $sp, 0
181+
; LA32-I64-NEXT: bl lrintl
182+
; LA32-I64-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
183+
; LA32-I64-NEXT: addi.w $sp, $sp, 32
184+
; LA32-I64-NEXT: ret
185+
;
186+
; LA64-I32-LABEL: test_lrint_ixx_f128:
187+
; LA64-I32: # %bb.0:
188+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
189+
; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
190+
; LA64-I32-NEXT: pcaddu18i $ra, %call36(lrintl)
191+
; LA64-I32-NEXT: jirl $ra, $ra, 0
192+
; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
193+
; LA64-I32-NEXT: addi.d $sp, $sp, 16
194+
; LA64-I32-NEXT: ret
195+
;
196+
; LA64-I64-LABEL: test_lrint_ixx_f128:
197+
; LA64-I64: # %bb.0:
198+
; LA64-I64-NEXT: addi.d $sp, $sp, -16
199+
; LA64-I64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
200+
; LA64-I64-NEXT: pcaddu18i $ra, %call36(lrintl)
201+
; LA64-I64-NEXT: jirl $ra, $ra, 0
202+
; LA64-I64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
203+
; LA64-I64-NEXT: addi.d $sp, $sp, 16
204+
; LA64-I64-NEXT: ret
205+
%res = tail call ITy @llvm.lrint.ITy.f128(fp128 %x)
206+
ret ITy %res
207+
}
208+
209+
define ITy @test_llrint_ixx_f128(fp128 %x) nounwind {
210+
; LA32-I32-LABEL: test_llrint_ixx_f128:
211+
; LA32-I32: # %bb.0:
212+
; LA32-I32-NEXT: addi.w $sp, $sp, -32
213+
; LA32-I32-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
214+
; LA32-I32-NEXT: ld.w $a1, $a0, 0
215+
; LA32-I32-NEXT: ld.w $a2, $a0, 4
216+
; LA32-I32-NEXT: ld.w $a3, $a0, 8
217+
; LA32-I32-NEXT: ld.w $a0, $a0, 12
218+
; LA32-I32-NEXT: st.w $a0, $sp, 20
219+
; LA32-I32-NEXT: st.w $a3, $sp, 16
220+
; LA32-I32-NEXT: st.w $a2, $sp, 12
221+
; LA32-I32-NEXT: addi.w $a0, $sp, 8
222+
; LA32-I32-NEXT: st.w $a1, $sp, 8
223+
; LA32-I32-NEXT: bl llrintl
224+
; LA32-I32-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
225+
; LA32-I32-NEXT: addi.w $sp, $sp, 32
226+
; LA32-I32-NEXT: ret
227+
;
228+
; LA32-I64-LABEL: test_llrint_ixx_f128:
229+
; LA32-I64: # %bb.0:
230+
; LA32-I64-NEXT: addi.w $sp, $sp, -32
231+
; LA32-I64-NEXT: st.w $ra, $sp, 28 # 4-byte Folded Spill
232+
; LA32-I64-NEXT: ld.w $a1, $a0, 0
233+
; LA32-I64-NEXT: ld.w $a2, $a0, 4
234+
; LA32-I64-NEXT: ld.w $a3, $a0, 8
235+
; LA32-I64-NEXT: ld.w $a0, $a0, 12
236+
; LA32-I64-NEXT: st.w $a0, $sp, 12
237+
; LA32-I64-NEXT: st.w $a3, $sp, 8
238+
; LA32-I64-NEXT: st.w $a2, $sp, 4
239+
; LA32-I64-NEXT: addi.w $a0, $sp, 0
240+
; LA32-I64-NEXT: st.w $a1, $sp, 0
241+
; LA32-I64-NEXT: bl llrintl
242+
; LA32-I64-NEXT: ld.w $ra, $sp, 28 # 4-byte Folded Reload
243+
; LA32-I64-NEXT: addi.w $sp, $sp, 32
244+
; LA32-I64-NEXT: ret
245+
;
246+
; LA64-I32-LABEL: test_llrint_ixx_f128:
247+
; LA64-I32: # %bb.0:
248+
; LA64-I32-NEXT: addi.d $sp, $sp, -16
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; LA64-I32-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; LA64-I32-NEXT: pcaddu18i $ra, %call36(llrintl)
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; LA64-I32-NEXT: jirl $ra, $ra, 0
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; LA64-I32-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; LA64-I32-NEXT: addi.d $sp, $sp, 16
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; LA64-I32-NEXT: ret
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;
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; LA64-I64-LABEL: test_llrint_ixx_f128:
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; LA64-I64: # %bb.0:
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; LA64-I64-NEXT: addi.d $sp, $sp, -16
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; LA64-I64-NEXT: st.d $ra, $sp, 8 # 8-byte Folded Spill
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; LA64-I64-NEXT: pcaddu18i $ra, %call36(llrintl)
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; LA64-I64-NEXT: jirl $ra, $ra, 0
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; LA64-I64-NEXT: ld.d $ra, $sp, 8 # 8-byte Folded Reload
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; LA64-I64-NEXT: addi.d $sp, $sp, 16
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; LA64-I64-NEXT: ret
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%res = tail call ITy @llvm.llrint.ITy.f128(fp128 %x)
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ret ITy %res
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}

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