Skip to content

Commit 8b4def7

Browse files
vg0204vg0204
committed
Addressed reviewed changes making changes in LIT tests mainly.
1 parent d4089f8 commit 8b4def7

12 files changed

+128
-74
lines changed

‎llvm/docs/MIRLangRef.rst

Lines changed: 13 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -807,6 +807,19 @@ For an int eq predicate ``ICMP_EQ``, the syntax is:
807807
808808
%2:gpr(s32) = G_ICMP intpred(eq), %0, %1
809809
810+
Lanemask Operands
811+
^^^^^^^^^^^^^^^^^^
812+
813+
A Lanemask operand is 64-bit unsigned value that holds the lane information
814+
corrseponding to the source register operand in the instruction.
815+
816+
For example, the COPY_LANEMASK instruction using this operand would look
817+
like:
818+
819+
.. code-block:: text
820+
821+
$vgpr1 = COPY_LANEMASK $vgpr0, lanemask(00000000000000C0)
822+
810823
.. TODO: Describe the parsers default behaviour when optional YAML attributes
811824
are missing.
812825
.. TODO: Describe the syntax for virtual register YAML definitions.
@@ -819,7 +832,6 @@ For an int eq predicate ``ICMP_EQ``, the syntax is:
819832
.. TODO: Describe the syntax of the metadata machine operands, and the
820833
instructions debug location attribute.
821834
.. TODO: Describe the syntax of the register live out machine operands.
822-
.. TODO: Describe the syntax of the lanemask machine operands.
823835
.. TODO: Describe the syntax of the machine memory operands.
824836
825837
Comments

‎llvm/include/llvm/CodeGen/MachineInstr.h

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1428,9 +1428,10 @@ class MachineInstr
14281428
return getOpcode() == TargetOpcode::BUNDLE;
14291429
}
14301430

1431-
bool isCopy() const {
1432-
return (getOpcode() == TargetOpcode::COPY ||
1433-
getOpcode() == TargetOpcode::COPY_LANEMASK);
1431+
bool isCopy() const { return getOpcode() == TargetOpcode::COPY; }
1432+
1433+
bool isCopyLanemask() const {
1434+
return getOpcode() == TargetOpcode::COPY_LANEMASK;
14341435
}
14351436

14361437
bool isFullCopy() const {

‎llvm/lib/CodeGen/MachineVerifier.cpp

Lines changed: 16 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -2421,24 +2421,27 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) {
24212421
const Register SrcReg = SrcOp.getReg();
24222422
const Register DstReg = DstOp.getReg();
24232423
const LaneBitmask LaneMask = LaneMaskOp.getLaneMask();
2424+
LaneBitmask SrcMaxLanemask = LaneBitmask::getAll();
24242425

2425-
if (!SrcReg.isPhysical() || !DstReg.isPhysical()) {
2426-
if (!SrcReg.isPhysical()) {
2427-
report("Copy with lanemask Instruction uses virtual register", &SrcOp,
2428-
1);
2429-
}
2430-
if (!DstReg.isPhysical()) {
2431-
report("Copy with lanemask Instruction uses virtual register", &DstOp,
2432-
0);
2433-
}
2434-
break;
2426+
if (DstOp.getSubReg())
2427+
report("COPY_LANEMASK must use no sub-register index.", &DstOp, 0);
2428+
2429+
if (SrcOp.getSubReg())
2430+
report("COPY_LANEMASK must use no sub-register index.", &SrcOp, 1);
2431+
2432+
if (SrcReg.isVirtual()) {
2433+
SrcMaxLanemask = MRI->getMaxLaneMaskForVReg(SrcReg);
24352434
}
24362435

24372436
if (LaneMask.none())
2438-
report("Lanemask takes up the zero value", MI);
2437+
report("COPY_LANEMASK copies no lanes.", MI);
24392438

2440-
if (LaneMask.all())
2441-
report("Copy Instruction can be used instead of copy with lanemask", MI);
2439+
// In case of Src as virtual register, all lanes active implies the max
2440+
// lanemask bits active for that register class, else all bits would be set.
2441+
if (LaneMask.all() || (SrcMaxLanemask == LaneMask))
2442+
report(
2443+
"COPY should be instead of COPY_LANEMASK, as all lanes are copied.",
2444+
MI);
24422445

24432446
break;
24442447
}

‎llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-0.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s -o /dev/null 2>&1 | FileCheck %s
1+
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
22

33
---
44
name: test_missing_rparen

‎llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-1.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s -o /dev/null 2>&1 | FileCheck %s
1+
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
22

33
---
44
name: test_missing_lparen

‎llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-2.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s -o /dev/null 2>&1 | FileCheck %s
1+
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
22

33
---
44
name: test_wrong_lanemask_type

‎llvm/test/CodeGen/MIR/AMDGPU/parse-lanemask-operand-invalid-3.mir

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
# RUN: not llc -mtriple=amdgcn-amd-amdhsa -run-pass=none -filetype=null %s 2>&1 | FileCheck %s
2+
3+
---
4+
name: test_empty_lanemask_type
5+
tracksRegLiveness: true
6+
body: |
7+
bb.0:
8+
liveins: $vgpr0
9+
10+
; CHECK: [[@LINE+1]]:45: expected a valid lane mask value.
11+
$vgpr1 = COPY_LANEMASK $vgpr0, lanemask()
12+
S_ENDPGM 0
13+
...

‎llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask0.mir

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,58 @@
1+
# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none %s 2>&1 | FileCheck %s
2+
3+
# CHECK: *** Bad machine code: COPY_LANEMASK copies no lanes. ***
4+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
5+
# CHECK-NEXT: - basic block: %bb.0
6+
# CHECK-NEXT: - instruction: $vgpr2 = COPY_LANEMASK $vgpr0, lanemask(0x0000000000000000)
7+
8+
# CHECK: *** Bad machine code: COPY should be instead of COPY_LANEMASK, as all lanes are copied. ***
9+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
10+
# CHECK-NEXT: - basic block: %bb.0
11+
# CHECK-NEXT: - instruction: $vgpr3 = COPY_LANEMASK $vgpr1, lanemask(0xFFFFFFFFFFFFFFFF)
12+
13+
# CHECK: *** Bad machine code: COPY should be instead of COPY_LANEMASK, as all lanes are copied. ***
14+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
15+
# CHECK-NEXT: - basic block: %bb.0
16+
# CHECK-NEXT: - instruction: %1:vgpr_32 = COPY_LANEMASK %0:vgpr_32, lanemask(0x0000000000000003)
17+
18+
# CHECK: *** Bad machine code: COPY should be instead of COPY_LANEMASK, as all lanes are copied. ***
19+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
20+
# CHECK-NEXT: - basic block: %bb.0
21+
# CHECK-NEXT: - instruction: %2:vgpr_32 = COPY_LANEMASK %1:vgpr_32, lanemask(0xFFFFFFFFFFFFFFFF)
22+
23+
# CHECK: *** Bad machine code: COPY should be instead of COPY_LANEMASK, as all lanes are copied. ***
24+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
25+
# CHECK-NEXT: - basic block: %bb.0
26+
# CHECK-NEXT: - instruction: %3:vreg_64 = COPY_LANEMASK $vgpr4_vgpr5, lanemask(0xFFFFFFFFFFFFFFFF)
27+
28+
# CHECK: *** Bad machine code: COPY should be instead of COPY_LANEMASK, as all lanes are copied. ***
29+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
30+
# CHECK-NEXT: - basic block: %bb.0
31+
# CHECK-NEXT: - instruction: $vgpr6_vgpr7 = COPY_LANEMASK %3:vreg_64, lanemask(0x000000000000000F)
32+
33+
# CHECK: *** Bad machine code: COPY_LANEMASK must use no sub-register index. ***
34+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_0
35+
# CHECK-NEXT: - basic block: %bb.0
36+
# CHECK-NEXT: - instruction: %4:vgpr_32 = COPY_LANEMASK %3.sub0:vreg_64, lanemask(0x0000000000000003)
37+
38+
# NOTE: For physical register, as we don't have way to obtain their maximal lanemask directly, so
39+
# COPY_LANEMASK is illegal only if all lane bits are active irrespective.
40+
41+
---
42+
name: test_copy_lanemask_instruction_0
43+
tracksRegLiveness: true
44+
body: |
45+
bb.0:
46+
liveins: $vgpr0, $vgpr1
47+
48+
%0:vgpr_32 = IMPLICIT_DEF
49+
$vgpr2 = COPY_LANEMASK $vgpr0, lanemask(0)
50+
$vgpr3 = COPY_LANEMASK $vgpr1, lanemask(0xFFFFFFFFFFFFFFFF)
51+
$vgpr4_vgpr5 = COPY_LANEMASK $vgpr2_vgpr3, lanemask(0x000000000000000F)
52+
%1:vgpr_32 = COPY_LANEMASK %0, lanemask(0x0000000000000003)
53+
%2:vgpr_32 = COPY_LANEMASK %1, lanemask(0xFFFFFFFFFFFFFFFF)
54+
%3:vreg_64 = COPY_LANEMASK $vgpr4_vgpr5, lanemask(0xFFFFFFFFFFFFFFFF)
55+
$vgpr6_vgpr7 = COPY_LANEMASK %3, lanemask(0x000000000000000F)
56+
%4:vgpr_32 = COPY_LANEMASK %3.sub0, lanemask(0x0000000000000003)
57+
S_ENDPGM 0
58+
...

‎llvm/test/MachineVerifier/AMDGPU/verifier-copyLanemask1.mir

Lines changed: 19 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,19 @@
1+
# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none %s 2>&1 | FileCheck %s
2+
3+
# CHECK: *** Bad machine code: Too few operands ***
4+
# CHECK-NEXT: - function: test_copy_lanemask_instruction_1
5+
# CHECK-NEXT: - basic block: %bb.0
6+
# CHECK-NEXT: - instruction: $vgpr2 = COPY_LANEMASK %0:vgpr_32
7+
8+
---
9+
name: test_copy_lanemask_instruction_1
10+
tracksRegLiveness: true
11+
body: |
12+
bb.0:
13+
liveins: $vgpr0, $vgpr1
14+
15+
%0:vgpr_32 = COPY $vgpr0
16+
$vgpr2 = COPY_LANEMASK %0
17+
S_ENDPGM 0
18+
...
19+

‎llvm/test/MachineVerifier/verifier-copyLanemask0.mir

Lines changed: 0 additions & 24 deletions
This file was deleted.

0 commit comments

Comments
 (0)