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‎llvm/test/CodeGen/AArch64/branch-on-zero.ll

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
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; RUN: llc -mtriple=aarch64 %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc -mtriple=aarch64 -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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define i32 @test_lshr(ptr nocapture %x, ptr nocapture readonly %y, i32 %n) {
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; CHECK-SD-LABEL: test_lshr:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: lsr w8, w2, #2
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; CHECK-SD-NEXT: cbz w8, .LBB0_2
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; CHECK-SD-NEXT: .LBB0_1: // %while.body
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; CHECK-SD-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-SD-NEXT: ldr w9, [x1], #4
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; CHECK-SD-NEXT: subs w8, w8, #1
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; CHECK-SD-NEXT: lsl w9, w9, #1
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; CHECK-SD-NEXT: str w9, [x0], #4
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; CHECK-SD-NEXT: b.ne .LBB0_1
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; CHECK-SD-NEXT: .LBB0_2: // %while.end
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; CHECK-SD-NEXT: mov w0, wzr
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_lshr:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: lsr w8, w2, #2
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; CHECK-GI-NEXT: cbz w8, .LBB0_2
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; CHECK-GI-NEXT: .LBB0_1: // %while.body
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; CHECK-GI-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-GI-NEXT: ldr w9, [x1], #4
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; CHECK-GI-NEXT: add x10, x0, #4
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; CHECK-GI-NEXT: subs w8, w8, #1
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; CHECK-GI-NEXT: lsl w9, w9, #1
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; CHECK-GI-NEXT: str w9, [x0]
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; CHECK-GI-NEXT: mov x0, x10
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; CHECK-GI-NEXT: b.ne .LBB0_1
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; CHECK-GI-NEXT: .LBB0_2: // %while.end
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; CHECK-GI-NEXT: mov w0, wzr
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; CHECK-GI-NEXT: ret
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entry:
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%shr = lshr i32 %n, 2
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%tobool.not4 = icmp eq i32 %shr, 0
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br i1 %tobool.not4, label %while.end, label %while.body
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while.body: ; preds = %entry, %while.body
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%c.07 = phi i32 [ %dec, %while.body ], [ %shr, %entry ]
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%x.addr.06 = phi ptr [ %incdec.ptr1, %while.body ], [ %x, %entry ]
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%y.addr.05 = phi ptr [ %incdec.ptr, %while.body ], [ %y, %entry ]
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%incdec.ptr = getelementptr inbounds i32, ptr %y.addr.05, i32 1
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%0 = load i32, ptr %y.addr.05, align 4
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%mul = shl nsw i32 %0, 1
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%incdec.ptr1 = getelementptr inbounds i32, ptr %x.addr.06, i32 1
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store i32 %mul, ptr %x.addr.06, align 4
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%dec = add nsw i32 %c.07, -1
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%tobool.not = icmp eq i32 %dec, 0
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br i1 %tobool.not, label %while.end, label %while.body
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while.end: ; preds = %while.body, %entry
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ret i32 0
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}
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define i32 @test_lshr2(ptr nocapture %x, ptr nocapture readonly %y, i32 %n) {
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; CHECK-SD-LABEL: test_lshr2:
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; CHECK-SD: // %bb.0: // %entry
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; CHECK-SD-NEXT: cmp w2, #4
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; CHECK-SD-NEXT: b.lo .LBB1_3
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; CHECK-SD-NEXT: // %bb.1: // %while.body.preheader
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; CHECK-SD-NEXT: lsr w8, w2, #2
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; CHECK-SD-NEXT: .LBB1_2: // %while.body
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; CHECK-SD-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-SD-NEXT: ldr w9, [x1], #4
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; CHECK-SD-NEXT: subs w8, w8, #1
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; CHECK-SD-NEXT: lsl w9, w9, #1
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; CHECK-SD-NEXT: str w9, [x0], #4
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; CHECK-SD-NEXT: b.ne .LBB1_2
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; CHECK-SD-NEXT: .LBB1_3: // %while.end
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; CHECK-SD-NEXT: mov w0, wzr
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_lshr2:
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; CHECK-GI: // %bb.0: // %entry
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; CHECK-GI-NEXT: cmp w2, #4
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; CHECK-GI-NEXT: b.lo .LBB1_3
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; CHECK-GI-NEXT: // %bb.1: // %while.body.preheader
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; CHECK-GI-NEXT: lsr w8, w2, #2
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; CHECK-GI-NEXT: .LBB1_2: // %while.body
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; CHECK-GI-NEXT: // =>This Inner Loop Header: Depth=1
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; CHECK-GI-NEXT: ldr w9, [x1], #4
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; CHECK-GI-NEXT: add x10, x0, #4
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; CHECK-GI-NEXT: subs w8, w8, #1
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; CHECK-GI-NEXT: lsl w9, w9, #1
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; CHECK-GI-NEXT: str w9, [x0]
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; CHECK-GI-NEXT: mov x0, x10
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; CHECK-GI-NEXT: b.ne .LBB1_2
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; CHECK-GI-NEXT: .LBB1_3: // %while.end
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; CHECK-GI-NEXT: mov w0, wzr
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; CHECK-GI-NEXT: ret
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entry:
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%tobool.not4 = icmp ult i32 %n, 4
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br i1 %tobool.not4, label %while.end, label %while.body.preheader
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while.body.preheader: ; preds = %entry
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%shr = lshr i32 %n, 2
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br label %while.body
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while.body: ; preds = %while.body.preheader, %while.body
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%c.07 = phi i32 [ %dec, %while.body ], [ %shr, %while.body.preheader ]
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%x.addr.06 = phi ptr [ %incdec.ptr1, %while.body ], [ %x, %while.body.preheader ]
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%y.addr.05 = phi ptr [ %incdec.ptr, %while.body ], [ %y, %while.body.preheader ]
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%incdec.ptr = getelementptr inbounds i32, ptr %y.addr.05, i32 1
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%0 = load i32, ptr %y.addr.05, align 4
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%mul = shl nsw i32 %0, 1
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%incdec.ptr1 = getelementptr inbounds i32, ptr %x.addr.06, i32 1
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store i32 %mul, ptr %x.addr.06, align 4
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%dec = add nsw i32 %c.07, -1
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%tobool.not = icmp eq i32 %dec, 0
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br i1 %tobool.not, label %while.end, label %while.body
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while.end: ; preds = %while.body, %entry
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ret i32 0
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}
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define i32 @lshr(i32 %u) {
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; CHECK-LABEL: lshr:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: mov w19, w0
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; CHECK-NEXT: cmp w0, #16
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; CHECK-NEXT: mov w8, w0
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; CHECK-NEXT: b.lo .LBB2_2
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; CHECK-NEXT: // %bb.1: // %if.then
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; CHECK-NEXT: lsr w0, w19, #4
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; CHECK-NEXT: bl use
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; CHECK-NEXT: add w8, w19, w19, lsl #1
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; CHECK-NEXT: .LBB2_2: // %if.end
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; CHECK-NEXT: sub w9, w19, #7
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; CHECK-NEXT: cmp w8, w9
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; CHECK-NEXT: cset w0, hi
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; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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%cmp.not = icmp ult i32 %u, 16
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br i1 %cmp.not, label %if.end, label %if.then
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if.then: ; preds = %entry
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%shr = lshr i32 %u, 4
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tail call void @use(i32 noundef %shr)
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%mul = mul i32 %u, 3
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br label %if.end
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if.end: ; preds = %if.then, %entry
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%u.addr.0 = phi i32 [ %mul, %if.then ], [ %u, %entry ]
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%sub = add i32 %u, -7
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%cmp1 = icmp ugt i32 %u.addr.0, %sub
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%conv = zext i1 %cmp1 to i32
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ret i32 %conv
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}
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declare void @use(i32)
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