From f2e6cc32750fff9f5d8c77829231d86032200419 Mon Sep 17 00:00:00 2001 From: woruyu <1214539920@qq.com> Date: Fri, 18 Jul 2025 18:55:21 +0800 Subject: [PATCH 1/2] [DAG][ARM] computeKnownBitsForTargetNode - add handling for ARMISD VORRIMM\VBICIMM nodes --- llvm/lib/Target/ARM/ARMISelLowering.cpp | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index fd3b0525c1056..e9ec35fa1dd8c 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -20106,6 +20106,31 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op, Known = KnownOp0.intersectWith(KnownOp1); break; } + case ARMISD::VORRIMM: { + KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); + + unsigned Encoded = Op.getConstantOperandVal(1); + unsigned ElemSize = Op.getValueType().getScalarSizeInBits(); + uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize); + APInt Imm(Known.getBitWidth(), DecodedVal); + + Known.One = KnownLHS.One | Imm; + Known.Zero = KnownLHS.Zero & ~Imm; + return; + } + case ARMISD::VBICIMM: { + KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); + + unsigned Encoded = Op.getConstantOperandVal(1); + unsigned ElemSize = Op.getValueType().getScalarSizeInBits(); + uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize); + APInt Imm(Known.getBitWidth(), DecodedVal); + + APInt NotImm = ~Imm; + Known.One = KnownLHS.One & NotImm; + Known.Zero = KnownLHS.Zero | Imm; + return; + } } } From 97757a89b9ca7c180358a80cdf2510b01dd497e6 Mon Sep 17 00:00:00 2001 From: woruyu <1214539920@qq.com> Date: Mon, 21 Jul 2025 10:43:20 +0800 Subject: [PATCH 2/2] fix: review --- llvm/lib/Target/ARM/ARMISelLowering.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index e9ec35fa1dd8c..ef9cbac0ec4e9 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -20110,9 +20110,9 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op, KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); unsigned Encoded = Op.getConstantOperandVal(1); - unsigned ElemSize = Op.getValueType().getScalarSizeInBits(); + unsigned ElemSize = Op.getScalarValueSizeInBits(); uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize); - APInt Imm(Known.getBitWidth(), DecodedVal); + APInt Imm(ElemSize, DecodedVal); Known.One = KnownLHS.One | Imm; Known.Zero = KnownLHS.Zero & ~Imm; @@ -20122,9 +20122,9 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op, KnownBits KnownLHS = DAG.computeKnownBits(Op.getOperand(0), Depth + 1); unsigned Encoded = Op.getConstantOperandVal(1); - unsigned ElemSize = Op.getValueType().getScalarSizeInBits(); + unsigned ElemSize = Op.getScalarValueSizeInBits(); uint64_t DecodedVal = ARM_AM::decodeVMOVModImm(Encoded, ElemSize); - APInt Imm(Known.getBitWidth(), DecodedVal); + APInt Imm(ElemSize, DecodedVal); APInt NotImm = ~Imm; Known.One = KnownLHS.One & NotImm;