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uefi: Adjusting documentation and attributes for QA test
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6 files changed

+41
-36
lines changed

6 files changed

+41
-36
lines changed

‎uefi-raw/src/protocol/pci/resource.rs

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,10 @@
1+
// SPDX-License-Identifier: MIT OR Apache-2.0
2+
13
use bitflags::bitflags;
2-
use static_assertions::assert_eq_size;
34

45
/// Descriptor for current PCI root bridge's configuration space.
56
/// Specification:
6-
/// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#qword-address-space-descriptor
7+
/// <https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#qword-address-space-descriptor>
78
#[repr(C, packed)]
89
#[derive(Debug)]
910
pub struct QWordAddressSpaceDescriptor {
@@ -18,7 +19,6 @@ pub struct QWordAddressSpaceDescriptor {
1819
pub translation_offset: u64,
1920
pub address_length: u64,
2021
}
21-
assert_eq_size!(QWordAddressSpaceDescriptor, [u8; 0x2E]);
2222

2323
newtype_enum! {
2424
/// Indicates which type of resource this descriptor describes.

‎uefi-raw/src/protocol/pci/root_bridge.rs

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,7 @@ newtype_enum! {
4040

4141
bitflags! {
4242
/// Describes PCI I/O Protocol Attribute bitflags specified in UEFI specification.
43-
///. https://uefi.org/specs/UEFI/2.10_A/14_Protocols_PCI_Bus_Support.html
43+
/// <https://uefi.org/specs/UEFI/2.10_A/14_Protocols_PCI_Bus_Support.html>
4444
#[derive(Copy, Clone, Debug, Eq, PartialEq)]
4545
#[repr(transparent)]
4646
pub struct PciRootBridgeIoProtocolAttribute: u64 {
@@ -156,6 +156,7 @@ impl PciRootBridgeIoProtocol {
156156
}
157157

158158
impl PciRootBridgeIoProtocolWidth {
159+
#[must_use]
159160
pub fn size(self) -> usize {
160161
match self {
161162
Self::UINT8 | Self::FIFO_UINT8 | Self::FILL_UINT8 => 1,

‎uefi/src/proto/pci/buffer.rs

Lines changed: 13 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -37,43 +37,44 @@ impl<'p, T> PciBuffer<'p, MaybeUninit<T>> {
3737
/// # Safety
3838
/// Callers of this function must guarantee that value stored is valid.
3939
#[must_use]
40-
pub unsafe fn assume_init(self) -> PciBuffer<'p, T> {
41-
let old = ManuallyDrop::new(self);
42-
PciBuffer {
43-
base: old.base.cast(),
44-
pages: old.pages,
45-
proto: old.proto,
46-
}
40+
pub const unsafe fn assume_init(self) -> PciBuffer<'p, T> {
41+
let initialized = PciBuffer {
42+
base: self.base.cast(),
43+
pages: self.pages,
44+
proto: self.proto,
45+
};
46+
let _ = ManuallyDrop::new(self);
47+
initialized
4748
}
4849
}
4950

50-
impl<'p, T> AsRef<T> for PciBuffer<'p, T> {
51+
impl<T> AsRef<T> for PciBuffer<'_, T> {
5152
fn as_ref(&self) -> &T {
5253
unsafe { self.base.as_ref() }
5354
}
5455
}
5556

56-
impl<'p, T> AsMut<T> for PciBuffer<'p, T> {
57+
impl<T> AsMut<T> for PciBuffer<'_, T> {
5758
fn as_mut(&mut self) -> &mut T {
5859
unsafe { self.base.as_mut() }
5960
}
6061
}
6162

62-
impl<'p, T> Deref for PciBuffer<'p, T> {
63+
impl<T> Deref for PciBuffer<'_, T> {
6364
type Target = T;
6465

6566
fn deref(&self) -> &Self::Target {
6667
self.as_ref()
6768
}
6869
}
6970

70-
impl<'p, T> DerefMut for PciBuffer<'p, T> {
71+
impl<T> DerefMut for PciBuffer<'_, T> {
7172
fn deref_mut(&mut self) -> &mut Self::Target {
7273
self.as_mut()
7374
}
7475
}
7576

76-
impl<'p, T> Drop for PciBuffer<'p, T> {
77+
impl<T> Drop for PciBuffer<'_, T> {
7778
fn drop(&mut self) {
7879
let status = unsafe {
7980
(self.proto.free_buffer)(self.proto, self.pages.get(), self.base.as_ptr().cast())

‎uefi/src/proto/pci/region.rs

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -76,7 +76,7 @@ where
7676
}
7777
}
7878

79-
impl<'p, 'r> Drop for PciMappedRegion<'p, 'r> {
79+
impl Drop for PciMappedRegion<'_, '_> {
8080
fn drop(&mut self) {
8181
let status = unsafe { (self.proto.unmap)(self.proto, self.key) };
8282
match status {

‎uefi/src/proto/pci/resource.rs

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@ use uefi_raw::protocol::pci::resource::{QWordAddressSpaceDescriptor, ResourceTyp
77

88
/// Describes resource type specific flags.
99
/// ACPI Specification:
10-
/// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#type-specific-attributes
10+
/// <https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#type-specific-attributes>
1111
#[derive(Debug)]
1212
pub enum TypeFlag {
1313
/// Flags for Memory type resource.
@@ -20,7 +20,7 @@ pub enum TypeFlag {
2020

2121
/// Flags for Memory type resource.
2222
/// ACPI Specification:
23-
/// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#memory-resource-flag-resource-type-0-definitions
23+
/// <https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#memory-resource-flag-resource-type-0-definitions>
2424
#[derive(Debug)]
2525
pub struct MemoryFlag {
2626
/// Specifies if this resource is I/O on primary side of the bridge.
@@ -43,7 +43,7 @@ pub struct MemoryFlag {
4343

4444
/// Flags for Io type resource.
4545
/// ACP Specification:
46-
/// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#io-resource-flag-resource-type-1-definitions
46+
/// <https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#io-resource-flag-resource-type-1-definitions>
4747
#[derive(Debug)]
4848
pub struct IoFlags {
4949
/// Specifies sparsity of address translation.
@@ -62,7 +62,7 @@ pub struct IoFlags {
6262
/// Flags for Bus type resource.
6363
/// Currently, it's unused and all bits should be 0.
6464
/// ACPI Specification:
65-
/// https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#bus-number-range-resource-flag-resource-type-2-definitions
65+
/// <https://uefi.org/htmlspecs/ACPI_Spec_6_4_html/06_Device_Configuration/Device_Configuration.html#bus-number-range-resource-flag-resource-type-2-definitions>
6666
#[derive(Debug)]
6767
pub struct BusFlags {
6868
_reserved: u8,
@@ -224,6 +224,7 @@ impl MemoryFlag {
224224
///
225225
/// # Panic
226226
/// Panics when reserved bits are not 0.
227+
#[must_use]
227228
pub fn new(flags: u8) -> Self {
228229
let write_status = WriteStatus(flags & 0b1);
229230
let mem_attribute = MemAttribute((flags >> 1) & 0b11);
@@ -245,6 +246,7 @@ impl IoFlags {
245246
///
246247
/// # Panic
247248
/// Panics when reserved bits are not 0.
249+
#[must_use]
248250
pub fn new(flags: u8) -> Self {
249251
assert_ne!(flags & 0b11, 0);
250252
let rng_range = RngRange(flags & 0b11);
@@ -269,6 +271,7 @@ impl BusFlags {
269271
///
270272
/// # Panic
271273
/// Panics when byte is not 0.
274+
#[must_use]
272275
pub fn new(flags: u8) -> Self {
273276
assert_eq!(flags, 0);
274277
Self { _reserved: 0 }

‎uefi/src/proto/pci/root_bridge.rs

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -3,6 +3,7 @@
33
//! PCI Root Bridge protocol.
44
55
use super::{PciIoUnit, encode_io_mode_and_unit};
6+
use crate::Status;
67
use crate::StatusExt;
78
use crate::proto::pci::buffer::PciBuffer;
89
use crate::proto::pci::region::PciMappedRegion;
@@ -18,17 +19,13 @@ use log::debug;
1819
use uefi::proto::pci::PciIoMode;
1920
use uefi::proto::pci::root_bridge::io_access::IoAccessType;
2021
use uefi_macros::unsafe_protocol;
21-
use uefi_raw::Status;
2222
use uefi_raw::protocol::pci::resource::QWordAddressSpaceDescriptor;
2323
use uefi_raw::protocol::pci::root_bridge::{
2424
PciRootBridgeIoAccess, PciRootBridgeIoProtocol, PciRootBridgeIoProtocolAttribute,
2525
PciRootBridgeIoProtocolOperation,
2626
};
2727
use uefi_raw::table::boot::{AllocateType, MemoryType, PAGE_SIZE};
2828

29-
#[cfg(doc)]
30-
use crate::Status;
31-
3229
/// Protocol that provides access to the PCI Root Bridge I/O protocol.
3330
///
3431
/// # UEFI Spec Description
@@ -42,12 +39,13 @@ pub struct PciRootBridgeIo(PciRootBridgeIoProtocol);
4239
impl PciRootBridgeIo {
4340
/// Get the segment number where this PCI root bridge resides.
4441
#[must_use]
45-
pub fn segment_nr(&self) -> u32 {
42+
pub const fn segment_nr(&self) -> u32 {
4643
self.0.segment_number
4744
}
4845

4946
/// Access PCI operations on this root bridge.
50-
pub fn pci(&self) -> PciIoAccessPci<'_, io_access::Pci> {
47+
#[must_use]
48+
pub const fn pci(&self) -> PciIoAccessPci<'_, io_access::Pci> {
5149
PciIoAccessPci {
5250
proto: ptr::from_ref(&self.0).cast_mut(),
5351
io_access: &self.0.pci,
@@ -56,7 +54,8 @@ impl PciRootBridgeIo {
5654
}
5755

5856
/// Access I/O operations on this root bridge.
59-
pub fn io(&self) -> PciIoAccessPci<'_, io_access::Io> {
57+
#[must_use]
58+
pub const fn io(&self) -> PciIoAccessPci<'_, io_access::Io> {
6059
PciIoAccessPci {
6160
proto: ptr::from_ref(&self.0).cast_mut(),
6261
io_access: &self.0.io,
@@ -65,7 +64,8 @@ impl PciRootBridgeIo {
6564
}
6665

6766
/// Access memory operations on this root bridge.
68-
pub fn mem(&self) -> PciIoAccessPci<'_, io_access::Mem> {
67+
#[must_use]
68+
pub const fn mem(&self) -> PciIoAccessPci<'_, io_access::Mem> {
6969
PciIoAccessPci {
7070
proto: ptr::from_ref(&self.0).cast_mut(),
7171
io_access: &self.0.mem,
@@ -88,9 +88,9 @@ impl PciRootBridgeIo {
8888
/// # Errors
8989
/// - [`Status::INVALID_PARAMETER`] MemoryType is invalid.
9090
/// - [`Status::UNSUPPORTED`] Attributes is unsupported. The only legal attribute bits are:
91-
/// - [`PciRootBridgeIoProtocolAttribute::PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE`]
92-
/// - [`PciRootBridgeIoProtocolAttribute::PCI_ATTRIBUTE_MEMORY_CACHED`]
93-
/// - [`PciRootBridgeIoProtocolAttribute::PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE`]
91+
/// - [`PciRootBridgeIoProtocolAttribute::MEMORY_WRITE_COMBINE`]
92+
/// - [`PciRootBridgeIoProtocolAttribute::MEMORY_CACHED`]
93+
/// - [`PciRootBridgeIoProtocolAttribute::DUAL_ADDRESS_CYCLE`]
9494
/// - [`Status::OUT_OF_RESOURCES`] The memory pages could not be allocated.
9595
#[cfg(feature = "alloc")]
9696
pub fn allocate_buffer<T>(
@@ -207,7 +207,7 @@ impl PciRootBridgeIo {
207207

208208
let status = unsafe {
209209
(self.0.copy_mem)(
210-
((&self.0) as *const PciRootBridgeIoProtocol).cast_mut(),
210+
ptr::from_ref::<PciRootBridgeIoProtocol>(&self.0).cast_mut(),
211211
width,
212212
destination.as_ptr().addr() as u64,
213213
source.as_ptr().addr() as u64,
@@ -237,7 +237,7 @@ impl PciRootBridgeIo {
237237
let configuration_status = unsafe {
238238
(self.0.configuration)(
239239
&self.0,
240-
((&mut configuration_address) as *mut u64).cast::<*const c_void>(),
240+
ptr::from_mut::<u64>(&mut configuration_address).cast::<*const c_void>(),
241241
)
242242
};
243243
match configuration_status {
@@ -371,6 +371,7 @@ impl PciRootBridgeIo {
371371
///
372372
/// # Returns
373373
/// Both supported and used attribute will be returned in struct [`AttributeReport`]
374+
#[must_use]
374375
pub fn get_attributes(&self) -> AttributeReport {
375376
let mut supports = PciRootBridgeIoProtocolAttribute::empty();
376377
let mut attributes = PciRootBridgeIoProtocolAttribute::empty();
@@ -398,11 +399,10 @@ impl PciRootBridgeIo {
398399
///
399400
/// # Returns
400401
/// [`Ok`]: Optional resource range. It will only be available when resource
401-
/// parameter is Some and one of:
402+
/// parameter is Some and contains one of:
402403
/// - [`PciRootBridgeIoProtocolAttribute::MEMORY_WRITE_COMBINE`]
403404
/// - [`PciRootBridgeIoProtocolAttribute::MEMORY_CACHED`]
404405
/// - [`PciRootBridgeIoProtocolAttribute::MEMORY_DISABLE`]
405-
/// is set.
406406
///
407407
/// [`Err`]: Possible error cases:
408408
/// - [`Status::UNSUPPORTED`]: A bit is set in Attributes that is not supported by the PCI Root Bridge.

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