arm64: dts: qcom: sdm660-xiaomi-clover-plus: Add CABC support

The LP8556 backlight controller also supports the CABC feature, so
configure it to support this. Also remove a comment about EPROM start,
and clarify some EPROM values' meaning.

Signed-off-by: Nickolay Goppen <setotau@mainlining.org>

Author: setotau

arch/arm64/boot/dts/qcom/sdm660-xiaomi-clover-plus.dts

@@ -62,28 +62,24 @@
 		enable-supply = <&vreg_bl_vddio>;
 
 		bl-name = "lcd-backlight";
-		dev-ctrl = /bits/ 8 <0x05>;
+		dev-ctrl = /bits/ 8 <0x87>; /* pwm + i2c combined mode after shaper block, 12-bit */
 		init-brt = /bits/ 8 <0x7f>; /* 50% brightness */
 
-		/* TODO: Stange thing, according to datasheet for LP8556 valid
-		 * EEPROM addresses range from 0x98h to 0xAF, but driver
-		 * thinks A0 is lowest valid address. So write to 9E will be
-		 * silently discarded. Bug in driver? */
 		rom-9eh {
-			rom-addr = /bits/ 8 <0x9E>;
+			rom-addr = /bits/ 8 <0x9e>;
 			rom-val = /bits/ 8 <0x20>;
 		};
 		rom-a0h {
 			rom-addr = /bits/ 8 <0xa0>;
-			rom-val = /bits/ 8 <0x09>;
+			rom-val = /bits/ 8 <0x09>; /* max current 23.5mA */
 		};
 		rom-a1h {
 			rom-addr = /bits/ 8 <0xa1>;
-			rom-val = /bits/ 8 <0x5f>;
+			rom-val = /bits/ 8 <0x5f>; /* max current 23.5mA */
 		};
 		rom-a3h {
 			rom-addr = /bits/ 8 <0xa3>;
-			rom-val = /bits/ 8 <0x0e>;
+			rom-val = /bits/ 8 <0x0e>; /* Select brightness change transition duration 000 = 0 ms (immediate change)*/
 		};
 		rom-a5h {
 			rom-addr = /bits/ 8 <0xa5>;