Missed merge updates.

Author: sean-lawless

Lab24 TFTP/boards/peripherals/uart/16C650.c

@@ -1,6 +1,6 @@
 /*...................................................................*/
 /*                                                                   */
-/*   Module:  uart0.c                                                */
+/*   Module:  16C650.c                                               */
 /*   Version: 2015.0                                                 */
 /*   Purpose: uart0 system interface for 16C650 UART                 */
 /*                                                                   */

Lab24 TFTP/boards/rpi/board.c

@@ -85,10 +85,15 @@ void BoardInit(void)
   select = REG32(GPFSEL4);
   select &= ~(7 << 6);
 #elif RPI == 3
-  /* GPIO 29 is select register 2, number 9. 3 bits per GPIO so 9 */
-  /* Clear the 3 bit range (7) starting at bit 21 */
+  /* GPIO 29 is select register 2, number 9. 9 * 3 bits is bit 27 */
+  /* Clear the 3 bit range (7) starting at bit 27 */
   select = REG32(GPFSEL2);
   select &= ~(7 << 27);
+#elif RPI == 0
+  /* GPIO 16 is select register 1, number 6. 6 * 3 bits is bit 18 */
+  /* Clear the 3 bit range (7) starting at bit 18 */
+  select = REG32(GPFSEL1);
+  select &= ~(7 << 18);
 #else
   /* GPIO 47 is 7th register in GPFSEL4, so 7 * 3 bits or bit 21. */
   /* Clear the 3 bit range (7) starting at bit 21 */
@@ -107,12 +112,22 @@ void BoardInit(void)
   /* Configure LED (GPIO 29) starting at bit 27, as output (1). */
   select |= (GPIO_OUTPUT << 27);
   REG32(GPFSEL2) = select;
+#elif RPI == 0
+  /* Configure LED (GPIO 16) starting at bit 18, as output (1). */
+  select |= (GPIO_OUTPUT << 18);
+  REG32(GPFSEL1) = select;
 #else
   /* Configure the LED (GPIO 47) starting at bit 21, as output (1). */
   select |= (GPIO_OUTPUT << 21);
   REG32(GPFSEL4) = select;
 #endif
 
+#if RPI == 4
+  /* GPIO 42, 2 bits per PUP GPIO */
+  select = REG32(GPIO_PUP_PDN_CNTRL_REG2);
+  select &= ~(3 << ((42 - 32) * 2)); // clear old value
+  REG32(GPIO_PUP_PDN_CNTRL_REG2) = select | (GPPUP_PULL_UP) << ((42 - 32) * 2);
+#else
   /* GPPUD - GPio Pin Up Down configuration */
   /*   (0) disable pull up and pull down to float the GPIO */
   /*   (1 << 0) enable pull down (low) */
@@ -124,10 +139,7 @@ void BoardInit(void)
   /* Sleep for one hundred of a second to activate last command. */
   usleep(MICROS_PER_SECOND / 100);
 
-#if RPI == 4
-  /* Push GPPUD settings to GPPUDCLK1 GPIO 42. */
-  REG32(GPPUDCLK1) = (1 << (42 - 32)); /* GPIO 42 */
-#elif RPI == 3
+#if RPI == 3
   /* Push GPPUD settings to GPPUDCLK0 GPIO 29. */
   REG32(GPPUDCLK0) = (1 << 29); /* GPIO 29 */
 #else
@@ -137,8 +149,21 @@ void BoardInit(void)
 
   /* Sleep for one hundred of a second to activate last command. */
   usleep(MICROS_PER_SECOND / 100);
+#endif /* RPI == 4 */
+
 
 #if ENABLE_JTAG
+#if RPI == 4
+  /* 2 bits per PUP GPIO */
+  select = REG32(GPIO_PUP_PDN_CNTRL_REG1);
+  select &= ~(3 << ((22 - 16) * 2)); // Clear old GPIO 22 value
+  select &= ~(3 << ((23 - 16) * 2)); // Clear old GPIO 23 value
+  select &= ~(3 << ((24 - 16) * 2)); // Clear old GPIO 24 value
+  select &= ~(3 << ((25 - 16) * 2)); // Clear old GPIO 25 value
+  select &= ~(3 << ((26 - 16) * 2)); // Clear old GPIO 26 value
+  select &= ~(3 << ((27 - 16) * 2)); // Clear old GPIO 27 value
+  REG32(GPIO_PUP_PDN_CNTRL_REG1) = select; /* commit changes */
+#else
   /* Disable pull up/down for the next configured GPIO. */
   REG32(GPPUD) = GPPUD_OFF;
   usleep(MICROS_PER_MILLISECOND); /* 1ms hold time */
@@ -147,6 +172,7 @@ void BoardInit(void)
   REG32(GPPUDCLK0) = (1 << 22) | (1 << 23) | (1 << 24) | (1 << 25) |
                      (1 << 26) | (1 << 27);
   usleep(MICROS_PER_MILLISECOND); /* 1ms hold time */
+#endif
 
   // Select level alternate 4 to enable JTAG
   select = REG32(GPFSEL2);
@@ -174,13 +200,21 @@ void BoardInit(void)
   select |= GPIO_ALT0 << 15;    //set gpio15 to alt0
   REG32(GPFSEL1) = select;
 
+#if RPI == 4
+  /* UART is GPIO 14 and 15 with 2 bits per PUP GPIO */
+  select = REG32(GPIO_PUP_PDN_CNTRL_REG0);
+  select &= ~(3 << (14 * 2)); // Clear GPIO 14 value
+  select &= ~(3 << (15 * 2)); // Clear GPIO 15 value
+  REG32(GPIO_PUP_PDN_CNTRL_REG0) = select; /* commit changes */
+#else
   /* Disable pull up/down for the next configured GPIO. */
   REG32(GPPUD) = GPPUD_OFF;
   usleep(MICROS_PER_MILLISECOND); /* 1ms hold time */
 
   /* Configure no pull up/down for Rx and Tx GPIOs. */
   REG32(GPPUDCLK0) = (1 << 14) | (1 << 15); /* GPIO 14 and 15 */
   usleep(MICROS_PER_MILLISECOND); /* hold time */
+#endif
 
   /* Initialize the primary UART. */
   Uart0Init();
@@ -223,13 +257,21 @@ void BoardInit(void)
   select |= GPIO_ALT5 << 15;    //set gpio15 to alt5
   REG32(GPFSEL1) = select;
 
+#if RPI == 4
+  /* UART is GPIO 14 and 15 with 2 bits per PUP GPIO */
+  select = REG32(GPIO_PUP_PDN_CNTRL_REG0);
+  select &= ~(3 << (14 * 2)); // Clear old GPIO 14 value
+  select &= ~(3 << (15 * 2)); // Clear old GPIO 15 value
+  REG32(GPIO_PUP_PDN_CNTRL_REG0) = select; /* commit changes */
+#else
   /* Disable pull up/down clock. */
   REG32(GPPUD) = GPPUD_OFF;
   usleep(MICROS_PER_MILLISECOND);
 
   /* Commit pull up/down disable for Rx and Tx GPIOs. */
   REG32(GPPUDCLK0) = (1 << 14) | (1 << 15);
   usleep(MICROS_PER_MILLISECOND); // 1ms hold time
+#endif
 
   /* Initialize the secondary UART. */
   Uart1Init();
@@ -295,6 +337,9 @@ void LedOn(void)
 #elif RPI == 3
   /* RPI 3 has LED at GPIO 29, so set GPIO 29. */
   REG32(GPSET0) = 1 << 29;
+#elif RPI == 0
+  /* RPI 1A and B have LED at GPIO 16, so set GPIO 16. */
+  REG32(GPSET0) = 1 << 16;
 #else
   /* Other RPIs have LED at GPIO 47, so set GPIO 47. */
   REG32(GPSET1) = 1 << (47 - 32);
@@ -314,6 +359,9 @@ void LedOff(void)
 #elif RPI == 3
   /* RPI 3 has LED at GPIO 29, so clear GPIO 29. */
   REG32(GPCLR0) = 1 << 29;
+#elif RPI == 0
+  /* RPI 1A and B have LED at GPIO 16, so clear GPIO 16. */
+  REG32(GPCLR0) = 1 << 16;
 #else
   /* Other RPIs have LED at GPIO 47, so clear GPIO 47. */
   REG32(GPCLR1) = 1 << (47 - 32);

Lab24 TFTP/boards/rpi/board.h

@@ -46,8 +46,8 @@
 /*
  * SoC peripheral base addresses
 */
-#if RPI == 1
-#define PERIPHERAL_BASE 0x20000000 /* RPi B+ */
+#if RPI <= 1
+#define PERIPHERAL_BASE 0x20000000 /* RPi 1A through B+ */
 #elif RPI == 4
 #define PERIPHERAL_BASE 0xFE000000 /* RPi 4 */
 #else
@@ -91,6 +91,15 @@
 #define GPPUDCLK0       (GPIO_BASE | 0x98)
 #define GPPUDCLK1       (GPIO_BASE | 0x9C)
 
+// GPIO Pull Up and Down registers (RPI 4)
+#define GPIO_PUP_PDN_CNTRL_REG0 (GPIO_BASE | 0xE4)
+#define GPIO_PUP_PDN_CNTRL_REG1 (GPIO_BASE | 0xE8)
+#define GPIO_PUP_PDN_CNTRL_REG2 (GPIO_BASE | 0xEC)
+#define GPIO_PUP_PDN_CNTRL_REG3 (GPIO_BASE | 0xF0)
+#define   GPPUP_OFF       (0 << 0)
+#define   GPPUP_PULL_UP   (1 << 0)
+#define   GPPUP_PULL_DOWN (1 << 1)
+
 /*
  * Timer registers
 */
@@ -122,7 +131,7 @@
 #endif /* ENABLE_MALLOC */
 
 // GPU memory configuration
-#if RPI == 1
+#if RPI <= 1
   #define GPU_MEM_BASE  0x40000000 // L2 cache enabled
 #else
   #define GPU_MEM_BASE  0xC0000000 // L2 cache disabled

Lab24 TFTP/boards/rpi/openocd_rpi_jtag.cfg

@@ -4,7 +4,7 @@
 
 interface bcm2835gpio
 
-# FPI 1 (700 MHz clock)
+# RPI 1 (700 MHz clock)
 #bcm2835gpio_peripheral_base 0x20000000
 #bcm2835gpio_speed_coeffs 113714 28
 

Lab24 TFTP/boards/rpi/openocd_sipeed_jtag.cfg

@@ -10,7 +10,7 @@
 # http://www.hs-augsburg.de/~hhoegl/proj/usbjtag/usbjtag.html
 #
 
-interface ftdi
+adapter driver ftdi
 ftdi_device_desc "Dual RS232"
 ftdi_vid_pid 0x0403 0x6010