@@ -151,11 +151,12 @@ static int configure_dma(struct stream const *dma, struct dma_config *dma_cfg,
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return 0 ;
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}
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- static void dma_xfer_start (const struct device * dev , struct i2c_msg * msg )
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+ static int dma_xfer_start (const struct device * dev , struct i2c_msg * msg )
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{
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const struct i2c_stm32_config * cfg = dev -> config ;
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struct i2c_stm32_data * data = dev -> data ;
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I2C_TypeDef * i2c = cfg -> i2c ;
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+ int ret = 0 ;
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if ((msg -> flags & I2C_MSG_READ ) != 0U ) {
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/* Configure RX DMA */
@@ -166,10 +167,10 @@ static void dma_xfer_start(const struct device *dev, struct i2c_msg *msg)
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data -> dma_blk_cfg .dest_addr_adj = DMA_ADDR_ADJ_INCREMENT ;
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data -> dma_blk_cfg .block_size = data -> current .len ;
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- if ( configure_dma (& cfg -> rx_dma , & data -> dma_rx_cfg ,
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- & data -> dma_blk_cfg ) != 0 ) {
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- LOG_ERR ( "Problem setting up RX DMA" );
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- return ;
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+ ret = configure_dma (& cfg -> rx_dma , & data -> dma_rx_cfg , & data -> dma_blk_cfg );
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+
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+ if ( ret != 0 ) {
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+ return ret ;
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}
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LL_I2C_EnableDMAReq_RX (i2c );
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} else {
@@ -183,14 +184,14 @@ static void dma_xfer_start(const struct device *dev, struct i2c_msg *msg)
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data -> dma_blk_cfg .dest_addr_adj = DMA_ADDR_ADJ_NO_CHANGE ;
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data -> dma_blk_cfg .block_size = data -> current .len ;
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- if (configure_dma (& cfg -> tx_dma , & data -> dma_tx_cfg ,
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- & data -> dma_blk_cfg ) != 0 ) {
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- LOG_ERR ("Problem setting up TX DMA" );
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- return ;
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+ ret = configure_dma (& cfg -> tx_dma , & data -> dma_tx_cfg , & data -> dma_blk_cfg );
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+ if (ret != 0 ) {
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+ return ret ;
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}
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LL_I2C_EnableDMAReq_TX (i2c );
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}
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}
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+ return ret ;
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}
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static inline void dma_finish (const struct device * dev , struct i2c_msg * msg )
@@ -804,18 +805,32 @@ static int stm32_i2c_irq_xfer(const struct device *dev, struct i2c_msg *msg,
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uint32_t cr1 = I2C_CR1_ERRIE | I2C_CR1_STOPIE | I2C_CR1_TCIE | I2C_CR1_NACKIE ;
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#ifdef CONFIG_I2C_STM32_V2_DMA
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- dma_xfer_start (dev , msg );
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+ if (dma_xfer_start (dev , msg ) != 0 ) {
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+ goto dma_error ;
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+ }
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#else
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/* If not using DMA, also enable RX and TX empty interrupts */
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cr1 |= I2C_CR1_TXIE | I2C_CR1_RXIE ;
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- #endif
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+
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+ #endif /* CONFIG_I2C_STM32_V2_DMA */
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+
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cr1 |= LL_I2C_ReadReg (regs , CR1 );
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/* Enable interrupts */
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LL_I2C_WriteReg (regs , CR1 , cr1 );
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/* Wait for transfer to finish */
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return stm32_i2c_irq_msg_finish (dev , msg );
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+
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+ #ifdef CONFIG_I2C_STM32_V2_DMA
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+ dma_error :
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+ LL_I2C_Disable (regs );
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+ #if defined(CONFIG_I2C_TARGET )
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+ data -> master_active = false;
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+ #endif
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+
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+ return - EIO ;
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+ #endif /* CONFIG_I2C_STM32_V2_DMA */
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}
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#else /* !CONFIG_I2C_STM32_INTERRUPT */
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