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arch-arm32-bit ARM32-bit ARMarch-avr8-bit AVR8-bit AVRarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-Varch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-sparc32-bit and 64-bit SPARC32-bit and 64-bit SPARCarch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-aixIBM AIXIBM AIXos-uefios-zosIBM z/OSIBM z/OSzig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature
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Description
- Consider switching
*-uefi-*
targets touefi
instead ofwindows
for LLVM 21+ #21630 - RISC-V Extension Changes coming to LLVM 22 #25013
- [PowerPC][AIX] Specify correct ABI alignment for double llvm/llvm-project#144673 (data layout change)
- [ARM] support -mlong-calls -fPIC on arm32 #39970 llvm/llvm-project#147313
- [PowerPC] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152632 - [AVR] Change
half
to usesoftPromoteHalfType
llvm/llvm-project#152783 - [SPARC] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152727 - [WebAssembly] Change
half
to use soft promotion rather thanPromoteFloat
llvm/llvm-project#152833 - [llvm-objcopy][libObject] Add RISC-V big-endian support llvm/llvm-project#146913
- [clang][SPARC] Pass 16-aligned 16-byte structs as i128 in CC llvm/llvm-project#155829
-
Lines 355 to 356 in bb79c85
// .{ .cpu_arch = .xtensa, .os_tag = .freestanding, .abi = .none }, // .{ .cpu_arch = .xtensa, .os_tag = .linux, .abi = .none }, -
Line 242 in bb79c85
// .{ .cpu_arch = .s390x, .os_tag = .zos, .abi = .none },
Previous upgrade: #23176
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arch-arm32-bit ARM32-bit ARMarch-avr8-bit AVR8-bit AVRarch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISAarch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-Varch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecturearch-sparc32-bit and 64-bit SPARC32-bit and 64-bit SPARCarch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssemblyarch-xtensaTensilica XtensaTensilica Xtensabackend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.os-aixIBM AIXIBM AIXos-uefios-zosIBM z/OSIBM z/OSzig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature