[bsp][nxp][imx] WIP: Add FRDM-i.MX91 bsp

bsp/nxp/imx/imx91/Kconfig

@@ -0,0 +1,28 @@
+mainmenu "RT-Thread Configuration"
+
+BSP_DIR := .
+
+RTT_DIR := ../../../..
+
+PKGS_DIR := packages
+
+source "$(RTT_DIR)/Kconfig"
+osource "$PKGS_DIR/Kconfig"
+
+config BOARD_IMX91
+    bool
+    select ARCH_ARM_CORTEX_A55
+    select RT_USING_GIC_V2
+    default y
+
+config SOC_MIMX91X1D
+    bool
+    select ARCH_ARMV8
+    select ARCH_CPU_64BIT
+    select RT_USING_CACHE
+    select RT_USING_COMPONENTS_INIT
+    select RT_USING_USER_MAIN
+    select ARCH_ARM_BOOTWITH_FLUSH_CACHE
+    default y
+
+source "$(BSP_DIR)/drivers/Kconfig"

bsp/nxp/imx/imx91/Makefile

@@ -0,0 +1,10 @@
+scons:=python ${SCONS}\scons.py
+
+all:
+	@$(scons)
+
+clean:
+	@$(scons) -c
+
+copy:
+	@$(scons) --copy -s

bsp/nxp/imx/imx91/README.md

@@ -0,0 +1,13 @@
+# i.MX91
+
+The i.MX 91 applications processor features an Arm® Cortex®-A55 running at up to 1.4 GHz and support for modern LPDDR4 memory to enable platform longevity and reliability; dual Gigabit Ethernet for gateway or multi-network segment support; dual USB ports; and the essential I/O for products in smart factory, smart home, smart office, medical device, metering, and cost-optimized
+system-on-module platforms.
+
+The i.MX 91 may be used in applications such as:
+• EV Charging
+• Matter-enabled IoT Platforms
+• Smart Home, Office, and City
+• Building Automation and Monitoring
+• Industrial Monitoring and HMI
+• Portable or small form-factor Medical and Healthcare devices
+• Audio and Entertainment IoT

bsp/nxp/imx/imx91/SConscript

@@ -0,0 +1,14 @@
+# for module compiling
+import os
+from building import *
+
+cwd  = GetCurrentDir()
+objs = []
+list = os.listdir(cwd)
+
+for d in list:
+    path = os.path.join(cwd, d)
+    if os.path.isfile(os.path.join(path, 'SConscript')):
+        objs = objs + SConscript(os.path.join(d, 'SConscript'))
+
+Return('objs')

bsp/nxp/imx/imx91/SConstruct

@@ -0,0 +1,32 @@
+import os
+import sys
+import rtconfig
+
+if os.getenv('RTT_ROOT'):
+    RTT_ROOT = os.getenv('RTT_ROOT')
+else:
+    RTT_ROOT = os.path.join(os.getcwd(), '..', '..', '..', '..')
+
+sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
+from building import *
+
+TARGET = 'rtthread.' + rtconfig.TARGET_EXT
+
+DefaultEnvironment(tools=[])
+env = Environment(tools = ['mingw'],
+    AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
+    CC = rtconfig.CC, CFLAGS = rtconfig.CFLAGS,
+    CXX= rtconfig.CXX, CXXFLAGS = rtconfig.CFLAGS,
+    AR = rtconfig.AR, ARFLAGS = '-rc',
+    LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
+env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
+env['ASCOM'] = env['ASPPCOM']
+
+Export('RTT_ROOT')
+Export('rtconfig')
+
+# prepare building environment
+objs = PrepareBuilding(env, RTT_ROOT)
+
+# make a building
+DoBuilding(TARGET, objs)

bsp/nxp/imx/imx91/applications/SConscript

@@ -0,0 +1,9 @@
+from building import *
+
+cwd     = GetCurrentDir()
+src     = Glob('*.c') + Glob('*.cpp')
+CPPPATH = [cwd]
+
+group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/nxp/imx/imx91/drivers/Kconfig

@@ -0,0 +1,3 @@
+config RT_USING_UART1
+    bool "Enable UART1"
+    default y

bsp/nxp/imx/imx91/drivers/SConscript

@@ -0,0 +1,10 @@
+from building import *
+
+cwd = GetCurrentDir()
+src = Glob('*.c') + Glob('iomux/*.c')
+
+CPPPATH = [cwd, cwd + '/iomux']
+
+group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
+
+Return('group')

bsp/nxp/imx/imx91/drivers/board.c

@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-07-12     BruceOu    the first version
+ */
+
+#include <rthw.h>
+#include <rtthread.h>
+
+#include "board.h"
+
+#include <registers/regsarmglobaltimer.h>
+#include <registers/regsepit.h>
+
+#include <imx_uart.h>
+#include <epit.h>
+#include <cortex_a.h>
+
+#include <mmu.h>
+
+struct mem_desc platform_mem_desc[] = {
+    {0x00000000, 0x80000000, 0x00000000, DEVICE_MEM},
+    {0x80000000, 0xFFF00000, 0x80000000, NORMAL_MEM}
+};
+
+const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc)/sizeof(platform_mem_desc[0]);
+
+static void rt_hw_timer_isr(int vector, void *param)
+{
+    rt_tick_increase();
+    epit_get_compare_event(HW_EPIT1);
+}
+
+int rt_hw_timer_init(void)
+{
+    uint32_t freq;
+
+    // Make sure the timer is off.
+    HW_ARMGLOBALTIMER_CONTROL.B.TIMER_ENABLE = 0;
+
+    HW_ARMGLOBALTIMER_CONTROL.B.FCR0 =1;
+
+    HW_ARMGLOBALTIMER_CONTROL.B.FCR1 =0;
+
+    HW_ARMGLOBALTIMER_CONTROL.B.DBG_ENABLE =0;
+
+    // Clear counter.
+    HW_ARMGLOBALTIMER_COUNTER_HI_WR(0);
+    HW_ARMGLOBALTIMER_COUNTER_LO_WR(0);
+
+    // Now turn on the timer.
+    HW_ARMGLOBALTIMER_CONTROL.B.TIMER_ENABLE = 1;
+
+    freq = get_main_clock(IPG_CLK);
+
+    epit_init(HW_EPIT1, CLKSRC_IPG_CLK, freq / 1000000,
+              SET_AND_FORGET, 10000, WAIT_MODE_EN | STOP_MODE_EN);
+
+    epit_counter_enable(HW_EPIT1, 10000, IRQ_MODE);
+
+    rt_hw_interrupt_install(IMX_INT_EPIT1, rt_hw_timer_isr, RT_NULL, "tick");
+    rt_hw_interrupt_umask(IMX_INT_EPIT1);
+
+    return 0;
+}
+INIT_BOARD_EXPORT(rt_hw_timer_init);
+
+/**
+ * This function will initialize hardware board
+ */
+void rt_hw_board_init(void)
+{
+    enable_neon_fpu();
+    disable_strict_align_check();
+
+    rt_components_board_init();
+    rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
+}
+
+/*@}*/

bsp/nxp/imx/imx91/drivers/board.h

@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2006-2025, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-07-12     BruceOu    the first version
+ */
+
+#ifndef __BOARD_H__
+#define __BOARD_H__
+
+#include <registers.h>
+#include <irq_numbers.h>
+
+#include "imx91.h"
+#include "rtconfig.h"
+
+#if defined(__CC_ARM)
+extern int Image$$RW_IRAM1$$ZI$$Limit;
+#define HEAP_BEGIN      ((void*)&Image$$RW_IRAM1$$ZI$$Limit)
+#elif defined(__GNUC__)
+extern int __bss_end;
+#define HEAP_BEGIN      ((void*)&__bss_end)
+#endif
+
+#define HEAP_END        (void*)(0x80000000 + 32 * 1024 * 1024)
+
+void rt_hw_board_init(void);
+
+#endif

bsp/nxp/imx/imx91/drivers/imx91.h

@@ -0,0 +1,98 @@
+/*
+ * COPYRIGHT (C) 2015, Real-Thread Information Technology Ltd
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2025-07-12     BruceOu      The first verion
+ */
+
+#ifndef __IMX91_H__
+#define __IMX91_H__
+
+#include <rthw.h>
+#include <rtthread.h>
+
+/* SOC-relative definitions */
+//#include "realview.h"
+#include "gic_registers.h"
+#include "irq_numbers.h"
+
+/* the maximum number of gic */
+# define ARM_GIC_MAX_NR 1
+
+/* the maximum number of interrupts */
+#define ARM_GIC_NR_IRQS IMX_INTERRUPT_COUNT
+
+/* the maximum entries of the interrupt table */
+#define MAX_HANDLERS IMX_INTERRUPT_COUNT
+
+/* the basic constants needed by gic */
+rt_inline rt_uint32_t platform_get_gic_dist_base(void)
+{
+    rt_uint32_t gic_base;
+    asm volatile ("mrc p15, 4, %0, c15, c0, 0" : "=r"(gic_base));
+    return gic_base + kGICDBaseOffset;
+}
+
+rt_inline rt_uint32_t platform_get_gic_cpu_base(void)
+{
+    rt_uint32_t gic_base;
+    asm volatile ("mrc p15, 4, %0, c15, c0, 0" : "=r"(gic_base));
+    return gic_base + kGICCBaseOffset;
+}
+
+#define GIC_IRQ_START   0
+
+#define GIC_ACK_INTID_MASK              0x000003ff
+
+/* the definition needed by gic.c */
+#define __REG32(x)  (*((volatile unsigned int *)(x)))
+
+/* keep compatible with platform SDK */
+typedef enum {
+    CPU_0,
+    CPU_1,
+    CPU_2,
+    CPU_3,
+} cpuid_e;
+
+enum _gicd_sgi_filter
+{
+    //! Forward the interrupt to the CPU interfaces specified in the @a target_list parameter.
+    kGicSgiFilter_UseTargetList = 0,
+
+    //! Forward the interrupt to all CPU interfaces except that of the processor that requested
+    //! the interrupt.
+    kGicSgiFilter_AllOtherCPUs = 1,
+
+    //! Forward the interrupt only to the CPU interface of the processor that requested the
+    //! interrupt.
+    kGicSgiFilter_OnlyThisCPU = 2
+};
+
+typedef void (*irq_hdlr_t) (void);
+
+extern void rt_hw_interrupt_mask(int vector);
+extern void rt_hw_interrupt_umask(int vector);
+extern rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
+    void *param, const char *name);
+
+rt_inline void register_interrupt_routine(uint32_t irq_id, irq_hdlr_t isr)
+{
+    rt_hw_interrupt_install(irq_id, (rt_isr_handler_t)isr, NULL, "unknown");
+}
+
+rt_inline void enable_interrupt(uint32_t irq_id, uint32_t cpu_id, uint32_t priority)
+{
+    rt_hw_interrupt_umask(irq_id);
+}
+
+rt_inline void disable_interrupt(uint32_t irq_id, uint32_t cpu_id)
+{
+    rt_hw_interrupt_mask(irq_id);
+}
+
+#endif  /* __IMX91_H__ */
+

bsp/nxp/imx/imx91/drivers/iomux/iomux_config.c

@@ -0,0 +1,36 @@
+/*
+ * Copyright (c) 2025, Freescale Semiconductor, Inc.
+ * All rights reserved.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
+ * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+// File: iomux_config.c
+
+/* ------------------------------------------------------------------------------
+ * <auto-generated>
+ *     This code was generated by a tool.
+ *     Runtime Version:3.4.0.0
+ *
+ *     Changes to this file may cause incorrect behavior and will be lost if
+ *     the code is regenerated.
+ * </auto-generated>
+ * ------------------------------------------------------------------------------
+*/
+
+#include "iomux_config.h"
+
+// Function to configure iomux for i.MX91 board FRDM-i.MX91
+void iomux_config(void)
+{
+    uart1_iomux_config();
+}