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khallouh
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Some instructions take a singleton register class in their operands. If a copy of that same physical register from the function arguments is moved closer to its user by the pre-scheduler and it happens to move past an instruction requiring that singleton register class, a live range interference is created which the register allocator cannot resolve by evicting the function argument physical register, leading to a "ran out of registers" error.
To solve this, this introduces DAG mutator in the pre-scheduler with zero latency edge between such copies and such instructions, thus preventing the scheduler from creating the undesired interference.

continue;

auto MO = MI.getOperand(1);
if (!(MO.isReg() && MO.getReg().isPhysical()))
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nit:

if (!MO.isReg() || !MO.getReg().isPhysical())
       continue;

if (!MBB->isLiveIn(PhysReg))
continue;

SDep SingletonCopyEdge(&SU, SDep::Artificial);
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What about moving this into the scope of the if below?


for (SUnit &SU2 : DAG->SUnits) {
MachineInstr &MI = *SU2.getInstr();

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Are we creating an Edge from SU to itself?

@andcarminati
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Can we have a test that runs only premisched?

mgehre-amd added a commit that referenced this pull request Aug 21, 2025
[AutoBump] Merge with ceeb08b (Nov 18) (9)
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2 participants