AEGIS is an open hardware initiative to bring modular, upgradeable ARMv9 CPUs to developers, builders, and secure infrastructure.
- LGA-socketed ARMv9 CPUs β From 8-core to 128-core designs, fully documented.
- LGA-Z1 Socket β A new open CPU socket standard for ARM platforms.
- Modular Motherboards β PCIe Gen4, DDR5, NVMe, USB, and expansion-ready.
- BIEM Module β Behavioral enforcement chip that governs runtime execution, hardware access, and logs violations.
- Nova TPU β A plug-and-play INT8/FP16 inference card for local AI execution.
Most ARM hardware today is locked down and soldered in. AEGIS gives developers and system integrators a true upgrade path, open documentation, and a trust-first foundation for embedded AI, edge computing, and resilient infrastructure.
- β Public LGA socket spec (LGA-Z1)
- β Full schematics and pinout documentation
- β Modular firmware and PCIe-based expansion
- β Support for third-party motherboards (ASUS, ASRock, etc.)
- Provisional patents filed
- Dev kits and socket specs in progress
- Launching small-batch boards in 2025
- π Landing Page
- π§ Hackaday Project
- π¬ Contact: aegirontechnologies@gmail.com
Built by Aegiron Technologies. Open silicon for an open future.
This project is licensed under the CERN Open Hardware License v2 (Strongly Reciprocal).
See the LICENSE file for details.