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- ADRV9001 DUAL HDL Project
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+ ADRV9001- DUAL HDL Project
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===============================================================================
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Overview
@@ -24,7 +24,7 @@ Supported boards
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Supported devices
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-------------------------------------------------------------------------------
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- - :adi: `ADRV9002 `, in :adi: `ADRV9002NP/W2/PCBZ <EVAL-ADRV9002> `,
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+ - :adi: `ADRV9002 `, in :adi: `ADRV9002NP/W2/PCBZ <EVAL-ADRV9002> `
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Supported carriers
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-------------------------------------------------------------------------------
@@ -69,39 +69,42 @@ The :git-hdl:`AXI ADRV9001 IP <library/axi_adrv9001>` in this HDL project is
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configured to work in LVDS and CMOS interface; it supports two configuration
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modes:
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- - 2R2T - 2x Rx and 2x Tx independent control and DMAs for the two RF channels
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- - 1R1T - 1x Rx and 1x Tx common control and DMAs for the two RF channels also
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+ - 2R2T - 2x RX and 2x TX independent control and DMAs for the two RF channels
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+ - 1R1T - 1x RX and 1x TX common control and DMAs for the two RF channels also
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noted as R1_MODE
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- For any mode the number of RF channels(two) doesn't change only the controlling
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- instance and the DMAs.
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+ For any mode, the number of RF channels (two) doesn't change --- only the
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+ controlling instance and the DMAs do .
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The design has four receive paths and four transmit paths.
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- Two of the receive paths (Rx12) have four channels and the other (Rx2) two
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+
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+ Two of the receive paths (RX12) have four channels and the other (RX2) two
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channels. These only work independently, not concomitantly.
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- One must chose between two active paths (2R2T), or just the Rx12 (1R1T) path,
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- which has four active channels, while Rx2 is disabled.
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- The same applies to the transmit path but in the other direction.
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- When only the Rx12 path is active with four channels mode, the axi_adrv9001
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- core will take ownership of both of its source synchronous interfaces.
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+ One must choose between two active paths (2R2T), or just the RX12 (1R1T) path,
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+ which has four active channels, while RX2 is disabled.
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+
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+ The same applies to the transmit path, but in the other direction.
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+
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+ When only the RX12 path is active with four channels mode, the axi_adrv9001
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+ core will take ownership of both of its source-synchronous interfaces.
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The requirement in this case is that both interfaces, of an axi_adrv9001 core,
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run at the same rate.
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- Regarding the INDEPENDENT_1R1T_SUPPORT and COMMON_2R2T_SUPPORT parameters,
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+ Regarding the `` INDEPENDENT_1R1T_SUPPORT `` and `` COMMON_2R2T_SUPPORT `` parameters
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related to the above modes, their purpose is to remove the unused data paths,
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reducing in this way the resource utilisation. By default all modes/paths are
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available.
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- For more info see the parameter description section of :ref: `axi_adrv9001 `.
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+ For more info, see the Parameter Description section of :ref: `axi_adrv9001 `.
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Clock scheme
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- The clocks are managed by the ADRV9002 devices and are software programmable.
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- Please refer to the device datasheet for the various clocks within the device.
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+ The clocks are managed by the :adi: ` ADRV9002 ` devices and are software- programmable.
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+ Please refer to the device data sheet for the various clocks within the device.
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- Independently a board provides a 38.4MHz crystal for the :adi: `ADRV9002 `.
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+ Independently, a board provides a 38.4MHz crystal for the :adi: `ADRV9002 `.
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An external reference clock can also be used.
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CPU/Memory interconnects addresses
@@ -227,13 +230,39 @@ If you want to build the sources, ADI makes them available on the
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`clone <https://git-scm.com/book/en/v2/Git-Basics-Getting-a-Git-Repository >`__
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the HDL repository.
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+ This project has the following `make ` parameters:
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+
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+ - CMOS_LVDS_N - selects the interface type
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+ - 0 = LVDS (default)
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+ - 1 = CMOS
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+ - USE_RX_CLK_FOR_TX1 - selects the clock to drive the TX1 SSI interface
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+ - 0 = TX1 dedicated clock (default)
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+ - 1 = RX1 SSI clock
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+ - 2 = RX2 SSI clock
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+ - USE_RX_CLK_FOR_TX2 - selects the clock to drive the TX2 SSI interface
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+ - 0 = TX2 dedicated clock (default)
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+ - 1 = RX1 SSI clock
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+ - 2 = RX2 SSI clock
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+
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**Linux/Cygwin/WSL **
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- .. shell ::
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+ Building the default configuration (LVDS):
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+
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+ .. shell :: bash
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$cd hdl/projects/adrv9001_dual/zcu102
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$make
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+ Example configuration with CMOS:
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+
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+ .. shell :: bash
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+ ~/hdl/projects/adrv9001_dual/zcu102
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+ $make CMOS_LVDS_N=1
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+
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+ The result of the build, if parameters were used, will be in a folder named
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+ by the configuration used ``CMOSLVDSN1 ``.
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+
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A more comprehensive build guide can be found in the :ref: `build_hdl ` user guide.
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Resources
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Systems related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- Here you can find the quick start guides available for these evaluation boards:
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-
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- - :dokuwiki: `ZCU102 <resources/eval/user-guides/adrv9002_dual/quickstart/zynqmp> `
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-
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- Other useful information:
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-
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- :dokuwiki: `[Wiki] ADRV9001/2 User Guide <resources/eval/user-guides/adrv9001> `
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HDL related
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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- - :git-hdl: `ADRV9001 HDL project source code <projects/adrv9001 > `
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+ - :git-hdl: `ADRV9001_DUAL HDL project source code <projects/adrv9001_dual > `
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.. list-table ::
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:widths: 30 35 35
@@ -289,11 +312,8 @@ Software related
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- :dokuwiki: `[Wiki] ADRV9002 Device Driver Customization <resources/tools-software/linux-drivers/iio-transceiver/adrv9002-customization> `
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- :dokuwiki: `[Wiki] ADRV9002 Integrated Dual RF Transceiver Linux device driver <resources/tools-software/linux-drivers/iio-transceiver/adrv9002> `
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- List of Linux device trees (to be dev).
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-
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- - :git-linux: `adrv9002 ZCU102 (rev10) Linux device tree <arch/arm/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002-dual.dts> `
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- - :git-linux: `adrv9002 ZCU102 (rev10) Linux device 2rx2tx tree <arch/arm/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002-dual-rx2tx2.dts> `
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+ - :git-linux: `ADRV9002/ZCU102 Linux device tree <arch/arm/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002-dual.dts> `
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+ - :git-linux: `ADRV9002/ZCU102 Linux device tree 2RX2TX <arch/arm/boot/dts/xilinx/zynqmp-zcu102-rev10-adrv9002-dual-rx2tx2.dts> `
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.. include :: ../common/more_information.rst
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