Allow for more MSIs for PCI devices #5299
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Currently, we're limited to 24 GSI lines, which is too little for PCI devices. Keep the current ranges as "legacy IRQ", and create a new range for "GSI" that goes up to the kvm theoretical maximum of 4096 lines. Signed-off-by: Riccardo Mancini <mancio@amazon.com>
Codecov ReportAll modified and coverable lines are covered by tests ✅
Additional details and impacted files@@ Coverage Diff @@
## feature/pcie #5299 +/- ##
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Coverage 80.20% 80.21%
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Files 265 265
Lines 30832 30847 +15
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+ Hits 24730 24745 +15
Misses 6102 6102
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Until firecracker-microvm#5299 is merged, this test will fail. Ignore PCI on this test for now until we sort out the changes in the other PR. Signed-off-by: Riccardo Mancini <mancio@amazon.com>
Manciukic
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Until firecracker-microvm#5299 is merged, this test will fail. Ignore PCI on this test for now until we sort out the changes in the other PR. Signed-off-by: Riccardo Mancini <mancio@amazon.com>
Manciukic
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Until firecracker-microvm#5299 is merged, this test will fail. Ignore PCI on this test for now until we sort out the changes in the other PR. Signed-off-by: Riccardo Mancini <mancio@amazon.com>
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Folding this over to #5300 |
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Changes
Distinguish between interrupt lines for legacy devices ("irq") and GSIs used by MSIs for PCI devices ("gsi"). This means:
TODO: rebase pci branch and this PR on top of ARM max irq number fix (#5283)
Reason
Since we were still only using legacy IRQs for PCI devices, but each used one interrupt per queue plus one for the config, this meant we were limited to a handful of devices and not the expected 32.
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CONTRIBUTING.md.PR Checklist
tools/devtool checkstyleto verify that the PR passes theautomated style checks.
how they are solving the problem in a clear and encompassing way.
in the PR.
CHANGELOG.md.Runbook for Firecracker API changes.
integration tests.
TODO.rust-vmm.