Fixing DBL to FXP conversion #198
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Bleep bloop! LabVIEW Diff Robot here with some diffs served up hot for your pull request. Notice something funny? Help fix me on my GitHub repo. FPGA Register IO.lvlib--DBL to FXP Raw.vi.png
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Bleep bloop! LabVIEW Diff Robot here with some diffs served up hot for your pull request. Notice something funny? Help fix me on my GitHub repo. FPGA Register IO Tests.lvclass--test_FXP Signed Value Conversion_-0.5LSBto0.vi.png
FPGA Register IO.lvlib--DBL to FXP Raw.vi.png
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gahegde-ni
reviewed
Nov 6, 2025
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Bleep bloop! LabVIEW Diff Robot here with some diffs served up hot for your pull request. Notice something funny? Help fix me on my GitHub repo. FPGA Register IO Tests.lvclass--test_FXP Signed Value Conversion_-0.5LSBto0.vi.png
FPGA Register IO.lvlib--DBL to FXP Raw.vi.png
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Collaborator
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Bleep bloop! LabVIEW Diff Robot here with some diffs served up hot for your pull request. Notice something funny? Help fix me on my GitHub repo. FPGA Register IO Tests.lvclass--test_FXP Signed Value Conversion_-0.5LSBto0.vi.png
FPGA Register IO.lvlib--DBL to FXP Raw.vi.png
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gahegde-ni
approved these changes
Nov 12, 2025
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TODO: Check the above box with an 'x' indicating you've read and followed CONTRIBUTING.md.
What does this Pull Request accomplish?
DBL to FXP conversion is incorrect in FPGA Addon for some FXP datatypes
Why should this Pull Request be merged?
Adds a guard for small negative floating-point values in the FXP conversion. Values that would truncate to zero are returned as 0 instead of being incorrectly converted to the minimum fixed-point value. This prevents edge-case errors while preserving the existing conversion logic.
What testing has been done?
Experiment VI
Observation after fix
delta is .03125 so any value i.e data/delta > .5 it will round to delta in this case it will round to -.03125.
delta is .03125 so any value i.e data/delta < .5 it will round to 0 in this case it will round to -.03125.
