-
-
Notifications
You must be signed in to change notification settings - Fork 95
Open
Description
I noticed that when including a large netlist in the design, the simulation performance dropped significantly. This didn't happen with ModelSim and GHDL. I did a speed comparison running the same test where I commented in and out the netlist from the design:
| ModelSim | GHDL | NVC | |
|---|---|---|---|
| Without Netlist: | 2.1 s | 5.1 s | 2.4 s |
| With Netlist: | 2.7 s | 7.1 s | 3 min 34.7 s |
This is a large (118000 lines) netlist from Xilinx which instantiates around 10000 unisim library components.
I'm running version 1.18.1
Metadata
Metadata
Assignees
Labels
No labels