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Squash of Luca Codeluppi's thesis - QoS modes part (RTL) #60

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Squash of Luca Codeluppi's thesis - QoS modes part (RTL) #60

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fe12bd9
Squash of Luca Codeluppi's thesis - QoS modes part (RTL)
FrancescoConti Jul 4, 2025
e68bb7f
Update rtl/interco/hci_arbiter.sv
FrancescoConti Aug 28, 2025
d65d3f7
Update rtl/interco/hci_arbiter.sv
FrancescoConti Aug 28, 2025
d0085f1
Update rtl/interco/hci_arbiter.sv
FrancescoConti Aug 29, 2025
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4 changes: 2 additions & 2 deletions rtl/common/hci_package.sv
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Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,8 @@ package hci_package;
return (width != 32'd0) ? unsigned'(width - 1) : 32'd0;
endfunction

parameter int unsigned DEFAULT_DW = 32; // Default Data Width
parameter int unsigned DEFAULT_AW = 32; // Default Address Width
parameter int unsigned DEFAULT_DW = `ifdef DATA_WIDTH `DATA_WIDTH `else 32 `endif; // Default Data Width
parameter int unsigned DEFAULT_AW = `ifdef TOT_MEM_SIZE $clog2(`TOT_MEM_SIZE*1024) `else 32 `endif; // Default Address Width
parameter int unsigned DEFAULT_BW = 8; // Default Byte Width
parameter int unsigned DEFAULT_UW = 1; // Default User Width
parameter int unsigned DEFAULT_IW = 8; // Default ID Width
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5 changes: 4 additions & 1 deletion rtl/hci_interconnect.sv
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Expand Up @@ -62,6 +62,7 @@ module hci_interconnect
parameter int unsigned IW = N_HWPE+N_CORE+N_DMA+N_EXT, // ID Width
parameter int unsigned EXPFIFO = 0 , // FIFO Depth for HWPE Interconnect
parameter int unsigned SEL_LIC = 0 , // Log interconnect type selector
parameter int unsigned ARBITER_MODE = 0 , // Chosen mode for the arbiter
parameter int unsigned FILTER_WRITE_R_VALID[0:N_HWPE-1] = '{default: 0},
parameter hci_size_parameter_t `HCI_SIZE_PARAM(cores) = '0,
parameter hci_size_parameter_t `HCI_SIZE_PARAM(mems) = '0,
Expand Down Expand Up @@ -257,6 +258,7 @@ module hci_interconnect
hci_arbiter_tree #(
.NB_REQUESTS(N_HWPE),
.NB_CHAN ( N_MEM ),
.MODE( ARBITER_MODE ),
.`HCI_SIZE_PARAM(out)(`HCI_SIZE_PARAM(hwpe_mem_muxed))
) i_wide_port_arbiter_tree (
.clk_i ( clk_i ),
Expand All @@ -268,7 +270,8 @@ module hci_interconnect
);

hci_arbiter #(
.NB_CHAN ( N_MEM )
.NB_CHAN ( N_MEM ),
.MODE( ARBITER_MODE )
) i_wide_vs_narrow_arbiter (
.clk_i ( clk_i ),
.rst_ni ( rst_ni ),
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