-RISC-V CPU based on RV32i
Dependencies: verilator and gtkwave
Testbench Loads CPU mems with /hex and captures all CPU signals + memory dump
Latest Iteration Architecture Diagram:
-
Notifications
You must be signed in to change notification settings - Fork 0
rjoshi2002/cpu
About
No description, website, or topics provided.
Resources
Stars
Watchers
Forks
Releases
No releases published
Packages 0
No packages published