Enumerate instructions in execution order when emitting pcode

[toshipiazza]

Previously we would emit pcode for instructions in the order they appear
in the listing (order of increasing address). This assumption is
incorrect for DUPLEX instructions.

DUPLEX instructions appear in the listing in swapped order: the slot 0
instruction appears earlier in memory, followed by the slot 1
instruction. But execution order follows the opposite ordering: order of
decreasing slots (so slot 3, 2, 1, 0)

As a result, we would emit incorrect pcode for the following assembly:

{ R3 = memw(R2+#0x0); memw(R2+#0x0) = #0x0 }

As written, the load comes before the store, but since they are DUPLEX
the store would appear before the load, causing the load to be
const-propped. This commit fixes the issue.

Fixes #10

[toshipiazza]

Need to add tests. In particular I want to ensure the original code snippet is correct now

{ R3 = memw(R2+#0x0); memw(R2+#0x0) = #0x0 }

And the "Slot 1 store with slot 0 load" case is correct (Section 5.5)

{ memw(R5) = R2
  R3 = memh(R6) }:mem_noshuf

N.B. since we reorder dot-new predicates to the end of the packet, is it possible to float a conditional load past a store or vice versa?