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drivers: counter: rtc: esp32: LP TIMER support #96856
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Merged
henrikbrixandersen
merged 6 commits into
zephyrproject-rtos:main
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raffarost:feature/lp_timer
Oct 7, 2025
Merged
drivers: counter: rtc: esp32: LP TIMER support #96856
henrikbrixandersen
merged 6 commits into
zephyrproject-rtos:main
from
raffarost:feature/lp_timer
Oct 7, 2025
+200
−22
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uLipe
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LucasTambor
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Oct 1, 2025
wmrsouza
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Oct 1, 2025
sylvioalves
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Fix compatible name on device tree, to allow RTC timer based counter driver to be enabled. Disable rtc_timer node for all devices to keep standard. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Fix alarm setting when timer has overflown beyond 32-bit boundary. Timer is 48-bit, so it requires high word to be programmed along the 32-bit word managed by the driver. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Disable RTC interrupts when cancelling alarm, and clear callback data, to make sure no ISR/callback is serviced after alarm is cancelled. Also, check programmed ticks in ISR to make sure alarm triggered is not an outdated/cancelled event. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add support to LP TIMER peripheral, for ESP32-C6 and ESP32-H2 RTC counter support. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Make ticks tolerance configurable for chips which need a more relaxed value for testcase which assesses count precision. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Add RTC counter support (LP TIMER and RTC) for ESP32 chips. Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
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sylvioalves
approved these changes
Oct 1, 2025
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uLipe
approved these changes
Oct 1, 2025
wmrsouza
approved these changes
Oct 1, 2025
@nordic-krch would you take a look or re-assign anyone if needed? Thanks. |
nordic-krch
approved these changes
Oct 7, 2025
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Labels
area: Boards/SoCs
area: Counter
area: Devicetree Bindings
area: RISCV
RISCV Architecture (32-bit & 64-bit)
area: Tests
Issues related to a particular existing or missing test
area: Xtensa
Xtensa Architecture
platform: ESP32
Espressif ESP32
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Driver update and LP TIMER support for ESP32-H2 and ESP32-C6.
Update test config for other SoC's to include CI testing for RTC timer based counter driver.