[PowerPC] Change half to use soft promotion rather than PromoteFloat
#152632
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The second commit is the interesting part here. The first commit is in a standalone PR at #152625 and should land first. I am referencing https://ftp.rtems.org/pub/rtems/people/sebh/ABI64BitOpenPOWERv1.1_16July2015_pub.pdf for the ABI not having There is a new crash expanding LRINT that I am trying to figure out. |
The latest specification of the ELFv2 ABI can be found here: https://files.openpower.foundation/s/cfA2oFPXbbZwEBK :) "Table 2.13. Decimal Floating-Point Types" does not contain |
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Oh that's great, thank you for the link!
I think the correct place would be "Table 2.11. Scalar Types" under "Binary Floating-Point" ( |
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I'm stuck on the new crash, thought it just needed a new |
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@chenzheng1030, @EsmeYi, @lei137, @RolandF77 could you review this? Only the last commit "[PowerPC] Change half to use soft promotion" is relevant to be reviewed for this PR. There are other commits here because it needs a few other things to land first:
I'm avoiding marking this as "ready to review" for now so it doesn't ping everybody from the backends touched in these other PRs, but the change to soft promotion here should be ready to review. |
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(current failure in "ERROR: test_modulelist_deadlock" has to be unrelated) |
On platforms that soft promote `half`, using `lrint` intrinsics crashes
with the following:
SoftPromoteHalfOperand Op #0: t5: i32 = lrint t4
LLVM ERROR: Do not know how to soft promote this operator's operand!
PLEASE submit a bug report to https://github.com/llvm/llvm-project/issues/ and include the crash backtrace.
Stack dump:
0. Program arguments: /Users/tmgross/Documents/projects/llvm/llvm-build/bin/llc -mtriple=riscv32
1. Running pass 'Function Pass Manager' on module '<stdin>'.
2. Running pass 'RISC-V DAG->DAG Pattern Instruction Selection' on function '@test_lrint_ixx_f16'
Resolve this by adding a soft promotion.
`SoftPromoteHalfOp_FP_TO_XINT` is reused here since it provides the
correct input and output types. It is renamed `PromoteFloatOp_UnaryOp`
to match `PromoteFloatOp_UnaryOp` and similar functions that are used to
handle the same sets of intrinsics.
`f16` is more functional than just a storage type on the platform, though it does have some codegen issues [1]. To prepare for future changes, do the following nonfunctional updates to the existing `half` test: * Add tests for passing and returning the type directly. * Add tests showing bitcast behavior, which is currently incorrect but serves as a baseline. * Add tests for `fabs` and `copysign` (trivial operations that shouldn't require libcalls). * Add invocations for big-endian and for PPC32. * Rename the test to `half.ll` to reflect its status, which also matches other backends. [1]: llvm#97975
On PowerPC targets, `half` uses the default legalization of promoting to a `f32`. However, this has some fundamental issues related to inability to round trip. Resolve this by switching to the soft legalization, which passes `f16` as an `i16`. The PowerPC ABI Specification does not define a `_Float16` type, so the calling convention changes are acceptable. Fixes the PowerPC portion of [1]. A similar change was done for MIPS in f0231b6 ("[MIPS] Use softPromoteHalf legalization for fp16 rather than PromoteFloat (llvm#110199)") and for Loongarch in 13280d9 ("[loongarch][DAG][FREEZE] Fix crash when FREEZE a half(f16) type on loongarch (llvm#107791)"). [1]: llvm#97975
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On PowerPC targets,
halfuses the default legalization of promoting toa
f32. However, this has some fundamental issues related to inabilityto round trip. Resolve this by switching to the soft legalization, which
passes
f16as ani16.The PowerPC ABI Specification does not define a
_Float16type, so thecalling convention changes are acceptable.
Fixes the PowerPC part of #97975
Fixes the PowerPC part of #97981